Specialized decoupling-cap layout with VCC-pin alignment (#15)

[s300169140]

Closes #15.

What

Adds a dedicated layout path for partitions tagged `partitionType: "decoupling_caps"`. Caps are placed in a centered horizontal row, each rotated so its positive-voltage pin consistently faces the same direction across the row.

Why rotation alignment matters

In a clean schematic, all decoupling caps in a row should be oriented identically — every VCC pin pointing the same way (typically up). Mixed orientations make the schematic look messy even when the geometry is otherwise correct.

The straightforward "linear row" approach (which is also what #59 implements) just calls `availableRotations[0]` per cap. That works when all caps happen to be wired with VCC on the same pin number, but breaks the moment one cap is wired backwards (which happens whenever a maintainer drops in a cap from a different reference design).

This PR adds the bit that makes the row look uniform: it picks each cap's rotation based on which pin is actually connected to a positive-voltage net.

Algorithm

1. For each cap, find which pin (if any) is connected to a net with `isPositiveVoltageSource: true` (the existing `netMap` already carries that flag — `IdentifyDecouplingCapsSolver` uses the same data).
2. Pick a target side via majority vote of the caps' natural-rotation positions (preferring `y+` on ties). This minimizes the number of caps that need to be flipped from their input orientation.
3. For each cap, pick the rotation from `availableRotations` that puts its positive pin on the target side. Fall back to `availableRotations[0]` when the cap has no voltage signal.

Caps are then laid out left-to-right using `decouplingCapsGap` (or `chipGap`) and the row is centered on x=0.

Tests

• `tests/PackInnerPartitionsSolver/DecouplingCapsLayout.test.ts`:
  • happy-path: three caps where one is wired backwards (VCC on bottom pin instead of top). Verifies it gets flipped 180° while the others keep their natural rotation.
  • no-voltage-signal: a cap with no positive-voltage net falls back cleanly to `availableRotations[0]`.

Relationship to #59

#59 (h/t @Ojas2095) implements the same overall pattern (special-case for `decoupling_caps` → linear row) and is a good baseline. The differences are:

• Rotation alignment: this PR derives rotation from the positive-voltage pin's location; feat: implement linear layout for decoupling capacitor partitions #59 always uses `availableRotations[0]`. With reverse-wired caps you'd see alternating orientations under feat: implement linear layout for decoupling capacitor partitions #59.
• Includes tests that lock in the expected behavior (feat: implement linear layout for decoupling capacitor partitions #59 has no tests for the new layout).
• Doesn't touch the generic packer's pin-count-sort behavior (that change in feat: implement linear layout for decoupling capacitor partitions #59 affects all partitions, which felt like out-of-scope drift for this issue — happy to add it back as a separate PR if you want it).

If you'd prefer #59's broader changes plus the rotation alignment from this PR, happy to rebase mine on top.

Verification

• `bunx tsc --noEmit` — clean
• `bun run format:check` — clean
• `bun test` — 19 pass / 1 skip / 1 fail. The single failure is the pre-existing `IdentifyDecouplingCapsSolver06.test.ts` import error from the linked `.page.tsx` (also fails on `main`); this PR doesn't touch that path.

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[s300169140]

Heads up on the red 'test' check — that failure is pre-existing on main, unrelated to this PR.

The error is a transitive dep version mismatch:

SyntaxError: Export named 'convertCircuitJsonToSchematicSimulationSvg' not found in module circuit-to-svg

@tscircuit/schematic-viewer@2.0.61 (pinned by ^2.0.26 in package.json) references that symbol, but the resolved circuit-to-svg@0.0.174 doesn't export it. Triggered by tests/IdentifyDecouplingCapsSolver/IdentifyDecouplingCapsSolver06.test.ts importing problem from a .page.tsx that pulls in schematic-viewer via LayoutPipelineDebugger.

You can confirm by running bun test on main directly — same single failure, same module.

I deliberately didn't touch deps in this PR to keep the diff minimal and focused on #15. Two clean follow-up options when you're ready:

1. Bump @tscircuit/schematic-viewer to a version compatible with the installed circuit-to-svg (or pin both)
2. Add the missing export in circuit-to-svg and release a patch

Happy to send the fix as a separate PR if helpful. Just wanted to make sure the red badge doesn't read as 'this PR broke tests' — the new tests I added (tests/PackInnerPartitionsSolver/DecouplingCapsLayout.test.ts) both pass cleanly:

(pass) decoupling-caps partition lays caps in a centered horizontal row
(pass) decoupling-caps with no positive-voltage pin info falls back to first available rotation