feat: Specialized Linear Layout for Decoupling Capacitors

[watcharaponthod-code]

Summary

This PR implements a specialized linear layout for decoupling capacitors, as requested in #15.

Previously, decoupling capacitors were packed using the general PackSolver2, which often resulted in messy or overlapping layouts. I have introduced a dedicated createLinearDecouplingCapLayout method within SingleInnerPartitionPackingSolver that detects decoupling_caps partitions and arranges the capacitors in a clean, horizontal row centered at the origin.

Changes

• Specialized Packing Logic: In SingleInnerPartitionPackingSolver.ts, I added an early-return check for decoupling_caps partitions to use the new linear layout instead of the general solver.
• Deterministic Alignment: Capacitors are sorted by chipId and spaced using the decouplingCapsGap parameter.
• New Test Suite: Added tests/DecouplingCapsPacking.test.ts to verify the mathematical correctness and alignment of the new layout.

Verification

• Verified that the capacitors are perfectly aligned along the X-axis (y=0).
• Verified that the row is correctly centered relative to the partition origin.
• Confirmed that the spacing respects the decouplingCapsGap configuration.

/claim #15

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