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@alainmarcel SureLog - UHDM

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    14 repositories

    • uhdm2rtlil

      Public
      Yosys SystemVerilog Parser - UHDM 2 RTLIL Yosys Pass
      Verilog
      •
      Apache License 2.0
      •0•5•0•0•Updated Apr 6, 2026Apr 6, 2026

    • Surelog

      Public
      SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST API. Compiles on Linux gcc, Windows msys2-…
      C++
      •
      Apache License 2.0
      •79•26•0•0•Updated Apr 5, 2026Apr 5, 2026

    • UHDM

      Public
      Universal Hardware Data Model. A complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener. U…
      C++
      •
      Apache License 2.0
      •42•18•0•0•Updated Feb 22, 2026Feb 22, 2026

    • yosys

      Public
      Yosys Open SYnthesis Suite
      C++
      •
      ISC License
      •1.1k•0•0•0•Updated Jun 19, 2025Jun 19, 2025

    • yosys_akash

      Public
      Yosys Open SYnthesis Suite
      C++
      •
      ISC License
      •1.1k•0•0•0•Updated Dec 21, 2024Dec 21, 2024

    • yosys-uhdm-plugin-integration

      Public
      Python
      •
      Apache License 2.0
      •29•2•0•0•Updated Sep 1, 2023Sep 1, 2023

    • sv-tests

      Public
      Test suite designed to check compliance with the SystemVerilog standard.
      SystemVerilog
      •
      ISC License
      •87•0•0•0•Updated Jul 30, 2023Jul 30, 2023

    • antlr4

      Public
      ANTLR (ANother Tool for Language Recognition) is a powerful parser generator for reading, processing, executing, or translating structured text or binary files.
      Java
      •
      Other
      •3.4k•0•0•0•Updated Apr 13, 2022Apr 13, 2022

    • simview

      Public
      C++
      •
      MIT License
      •7•0•0•0•Updated Jan 23, 2022Jan 23, 2022

    • UHDM-integration-tests

      Public
      C++
      •
      Apache License 2.0
      •8•0•0•0•Updated Jun 22, 2021Jun 22, 2021

    • EasyCLA-code_only

      Public
      39•0•0•0•Updated Jun 10, 2021Jun 10, 2021

    • tsc

      Public
      CHIPS Alliance Technical Steering Committee
      Apache License 2.0
      •25•0•0•0•Updated May 25, 2021May 25, 2021

    • Help_Wanted

      Public
      Ideas that need engineering-power from the community for UHDM/Surelog/Related topics
      MIT License
      •0•2•4•0•Updated Oct 14, 2020Oct 14, 2020

    • verilator

      Public
      C++
      •
      GNU Lesser General Public License v3.0
      •5•0•0•0•Updated Feb 13, 2020Feb 13, 2020
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