Central synthesizer naming#652
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mkorbel1
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Apr 17, 2026
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I haven't finished reading it all yet, but first pass a few questions
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This is looking pretty good, thank you for refactoring it this way, I can see how it helps your other upcoming changes!
…al/instance naming routine names
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Looking close now to mergeable!
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Jun 10, 2026
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| _name = uniquifier.getUniqueName( | ||
| initialName: module.uniqueInstanceName, | ||
| _name = parentModule.namer.allocateName( |
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question: does this mean the name gets selected multiple times if you run the synthbuilder multiple times, but keeps the same namer being used? doesn't this mean all the good names would already be taken and you'd end up with totally different naming if you synthesized again?
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Description & Motivation
Migrate synthesis naming to a central namer so that all synthesizers (and even WaveDumper) can agree on signal naming.
This is needed for a new synthesizer to be added (netlist).
Related Issue(s)
None.
Testing
I ran existing examples in ROHD and compared SV.
I added extensive test matrix
test/naming_cases_test.dartfor the combinations of naming options (reserved, mergeable, etc) for which I generated tests that pass before and after the central naming.Two bugs were filed: bug #648 and bug #649 which are fixed in PR # 650 for the traditional SV code as well as in this PR for central naming).
I ran a very, very, very large design example and compared SV before and after.
Backwards-compatibility
Naming is slightly different due to ordering, so when we do have collisions, we will see _0, _1 on different signals. Plus the two bug fixes involving unnamed substructures and repeated const names.
Documentation
No. None needed.