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net: phytium: update phytium net driver support to 6.6.0.4#1679

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@mamingrui123 mamingrui123 commented May 11, 2026

This patches updates the support for phytium net driver.

Summary by Sourcery

Update Phytium Ethernet support with SGMII speed switching, improved feature handling, and add a new PCI-based virtual network driver for EP/RC configurations.

New Features:

  • Introduce SMCCC-based PHY speed switching support for Phytium v1 SGMII MACs and plumb it through the hardware interface.
  • Add IPv6 TSO support where LSO is advertised for Phytium and Cadence MACB network devices.
  • Add a Phytium PCI virtual network driver stack, including endpoint and root-complex drivers with DMA-based TX/RX queues and a character device interface for host memory access.

Bug Fixes:

  • Fix Phytium RX multi-buffer handling to avoid returning NULL on incomplete descriptors and correctly break the NAPI loop with -EAGAIN.
  • Ensure SGMII autonegotiation is correctly toggled based on link speed for both Phytium v1 and v2 MACs.
  • Use memcpy_toio/memcpy_fromio when accessing MMIO message ring buffers in the Phytium v2 MAC driver to avoid improper memory accesses.
  • Guard ACPI-specific power-management and LED initialisation code with CONFIG_ACPI to prevent build or runtime issues on non-ACPI systems.
  • Extend TSO alignment checks to also disable TSO6 when payload alignment is unsuitable, preventing malformed offloaded packets.
  • Clean MACB link-down TX cleanup by using spin_lock_bh around TX descriptor teardown to avoid race conditions in softirq context.

Enhancements:

  • Expose a PHY speed switch hook in the Phytium MAC hardware interface and track the previous speed to avoid unnecessary or unsupported internal reconfiguration.
  • Refine Phytium MAC power control paths to separate ACPI and non-ACPI handling more clearly.
  • Adjust feature flags and driver versioning for Phytium MAC to reflect new capabilities and bump the reported driver version.

Build:

  • Wire Phytium Ethernet and the new Phytium PCI virtual network drivers into the ethernet Makefile under dedicated vendor options, and add per-subdirectory Makefiles for EP and RC PCI vnet drivers.

The tx_ptr_lock is used in both softirq context (via macb_tx_complete in
NAPI poll) and task context (via macb_mac_link_down in workqueue).

Currently, macb_tx_complete() uses spin_lock(), which is appropriate for
softirq context, while macb_mac_link_down() also uses spin_lock(), which
does **not** disable softirqs. This mismatch causes a potential deadlock
if softirq interrupts the task context while it holds the lock, as
detected by lockdep:

    WARNING: inconsistent lock state
    inconsistent {IN-SOFTIRQ-W} -> {SOFTIRQ-ON-W} usage.
    ...
    *** DEADLOCK ***

Fix this by replacing spin_lock/unlock with spin_lock_bh/unlock_bh in
macb_mac_link_down(), ensuring softirqs are disabled before acquiring
the lock in task context.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Li Wencheng <liwencheng@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
The driver was using plain memcpy() to copy data to/from __iomem
msg_regs. When the MMIO address is not naturally aligned
(e.g. ...904a), this triggers an alignment fault. With KASAN enabled,
this fault is reliably reproducible during driver probe:

  FSC = 0x21: alignment fault
  pc : __memcpy+0x58/0x230
  phytmac_v2_get_mac_addr+0xdc/0x180 [phytmac]

Root cause: using memcpy() on MMIO regions both violates I/O access
semantics and can lead to unaligned accesses.

Fix it by replacing memcpy() with memcpy_fromio() when reading messages
from msg ring and  memcpy_toio() when writing messages to the msg ring.
This avoids unaligned wide accesses and ensures proper MMIO semantics.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Li Tongfeng <litongfeng1497@phytium.com.cn>
Signed-off-by: Li Wencheng <liwencheng@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
On certain machines, the phy_id cannot be read. Adjusting the MDC
setting to occur before registering the mdiobus in
enable_mdio_control resolves this issue.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Ouyang Chenxing <ouyangchenxing2110@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Change the NULL return value to ERR_PTR(-EAGAIN) and handle it
properly in the upper-layer function to break the processing loop,
thereby avoiding warnings.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Ouyang Chenxing <ouyangchenxing2110@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Add support for NETIF_F_TSO6 in features check and default
config to enable IPv6 TSO functionality.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Ouyang Chenxing <ouyangchenxing2110@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Add NETIF_F_TSO6 support to MACB_NETIF_LSO to enable IPv6 TSO
functionality.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Ouyang Chenxing <ouyangchenxing2110@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Add support for the Phytium PCIe endpoint virtual
Ethernet (EP VNet) driver.
This driver enables the endpoint side of a PCIe-based
virtual Ethernet link, typically paired with a corresponding
root complex (RC) driver.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Li Tongfeng <litongfeng1497@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Add support for the Phytium PCIe root complex virtual
Ethernet (RC VNet) driver.
This driver enables the root complex side of a PCIe-based virtual
Ethernet link, typically paired with a corresponding endpoint
(EP) driver.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Li Tongfeng <litongfeng1497@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
To ensure proper auto-negotiation with the PHY at different link speeds,
the MAC requires mode-specific PHY initialization during speed transitions.
This patch adds dynamic speed reconfiguration for SGMII mode,
allowing the driver to switch between 2.5G/1G/100M/10M as needed.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Li Tongfeng <litongfeng1497@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
isabling CONFIG_ACPI will cause errors like 'error: implicit
declaration of function ‘acpi_evaluate_integer’, so it is necessary
to add #ifdef CONFIG_ACPI for protection.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Li Tongfeng <litongfeng1497@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Disabling CONFIG_ACPI will cause errors like 'error: implicit
declaration of function ‘acpi_get_acpi_dev’', so it is necessary
to add #ifdef CONFIG_ACPI for protection.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Li Tongfeng <litongfeng1497@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
…ing bug

Fix CRC errors observed on the EP side during high-rate UDP transmission.

Two issues in the RC TX path could lead to EP DMA reading stale or
incorrect data:

- The TX reclaim threshold condition was never met, causing descriptors
   to accumulate and TX queue state to become inconsistent.

- Incorrect TX index management allowed descriptors to be reused before
   their payloads were safely reclaimed.

Fix both the reclaim condition and index handling to ensure TX descriptors
are reclaimed in time and payload/DMA address mapping remains correct
to preventing EP-side CRC mismatches.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Li Tongfeng <litongfeng1497@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
Fix error handling paths in pci_epf_vnet_probe() to avoid unregistering
an unregistered char device when alloc_chrdev_region() fails.

Also add a NULL check for vnet in pci_epf_vnet_bind() to prevent NULL
pointer dereference when bind is called after a failed probe.

Signed-off-by: Ma Mingrui <mamingrui1243@phytium.com.cn>
Signed-off-by: Li Tongfeng <litongfeng1497@phytium.com.cn>
Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn>
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sourcery-ai Bot commented May 11, 2026

Reviewer's Guide

Updates the Phytium Ethernet MAC driver and adds a new PCIe-based virtual network driver stack, along with a few fixes and capability tweaks across Phytium and Cadence MAC drivers and related LED/ACPI handling.

Sequence diagram for packet transmit from RC to EP over PCIe virtual network

sequenceDiagram
  participant App as RC_Application
  participant NetRC as RC_netdev(pci_rc_vnet)
  participant TxQRC as RC_tx_queue
  participant PCI as PCIe_link
  participant EPC as EP_DMA_engine(pci_epc)
  participant NetEP as EP_netdev(pci_epf_vnet)
  participant RxQEP as EP_rx_queue

  App->>NetRC: send_skb()
  NetRC->>NetRC: pci_rc_vnet_start_xmit(skb)
  NetRC->>TxQRC: allocate_desc_and_set_addr_crc_len
  NetRC->>PCI: dma_map_single_and_sync
  NetRC->>TxQRC: mark_desc_USED
  NetRC->>NetRC: update_tx_tail
  NetRC->>PCI: write(SEND_MSI_IRQ_to_BAR1)

  PCI-->>NetEP: interrupt_rx_irqhandler
  NetEP->>NetEP: pci_epf_vnet_rx_irqhandler()
  NetEP->>NetEP: napi_schedule(rx_napi)
  NetEP->>NetEP: pci_epf_vnet_rx_poll(budget)

  NetEP->>RxQEP: read_head_tail_and_desc
  NetEP->>EPC: pci_epf_vnet_rc2ep_dma(dst_page_addr,src_rc_addr,len)
  EPC-->>NetEP: DMA_READ_complete_or_timeout
  NetEP->>NetEP: crc32_check_and_error_handling
  NetEP->>NetEP: ep_build_skb()
  NetEP->>RxQEP: clear_desc_USED
  NetEP->>NetEP: netif_receive_skb(skb)

  NetEP-->>App: packet_delivered_to_stack
Loading

Class diagram for new PCIe EP virtual net driver structures

classDiagram
  class pci_epf_vnet {
    +u32 msg_enable
    +void* reg[MAX_BAR_NUM]
    +struct pci_epf* epf
    +enum pci_barno vnet_reg_barno
    +struct hrtimer timer
    +struct timer_list link_detect_timer
    +u32 rx_refill_start
    +unsigned int rx_refill_num
    +u32 rx_ring_size
    +u32 rx_buffer_size
    +struct sk_buff** rx_skb
    +struct ep_rx_buffer* rx_buffer_info
    +int rx_buffer_len
    +u32 rx_next_to_alloc
    +struct param_range rxd_size
    +u32 tx_head
    +u32 tx_tail
    +u32 tx_ring_size
    +struct param_range txd_size
    +struct ep_tx_buffer* tx_buffer_info
    +struct net_device* netdev
    +spinlock_t tx_lock
    +spinlock_t rx_lock
    +struct napi_struct rx_napi
    +struct pci_ep_queue* queue
    +int(*clean_rc2ep)(struct pci_epf_vnet* vnet,int budget)
    +int rx_irq
    +bool bind_success
  }

  class pci_ep_queue {
    +struct ep_queue ep_rx_queue
    +struct ep_queue ep_tx_queue
  }

  class ep_queue {
    +u32 irq_num
    +u32 tail
    +u32 head
    +u32 nb_desc
    +u32 flags
    +struct pci_ep_dma_desc dma_desc_base[VNET_MAX_RXD]
  }

  class pci_ep_dma_desc {
    +u64 addr
    +u64 ctrl
  }

  class ep_rx_buffer {
    +dma_addr_t addr
    +struct page* page
    +u16 page_offset
    +u16 pagecnt_bias
  }

  class ep_tx_buffer {
    +dma_addr_t addr
    +void* vaddr
    +struct page* page
    +u16 page_offset
    +u16 pagecnt_bias
  }

  class phytium_pcie_ep {
    +void __iomem* reg_base
    +struct resource* mem_res
    +void __iomem* hpb_base
    +unsigned int max_regions
    +unsigned long ob_region_map
    +phys_addr_t* ob_addr
    +phys_addr_t irq_phys_addr
    +void __iomem* irq_cpu_addr
    +unsigned long irq_pci_addr
    +u8 irq_pci_fn
    +struct pci_epc* epc
    +struct platform_device* pdev
  }

  class cdev_mdata {
    +dev_t dev_num
    +struct page* page
    +phys_addr_t phys_addr
    +struct cdev* epf_cdev
    +struct class* epf_class
    +struct device* epf_device
    +struct pci_epf_vnet* cdev_vnet
  }

  class epf_ioctl_data {
    +u64 ktext_addr
    +u32 ktext_len
  }

  pci_epf_vnet --> pci_ep_queue : queue
  pci_ep_queue --> ep_queue : ep_rx_queue
  pci_ep_queue --> ep_queue : ep_tx_queue
  ep_queue --> pci_ep_dma_desc : dma_desc_base
  pci_epf_vnet --> ep_rx_buffer : rx_buffer_info
  pci_epf_vnet --> ep_tx_buffer : tx_buffer_info
  phytium_pcie_ep --> pci_epf_vnet : used_by_epf_vnet
  cdev_mdata --> pci_epf_vnet : cdev_vnet
Loading

Class diagram for new PCIe RC virtual net driver structures

classDiagram
  class pci_rc_vnet_private {
    +u32 msg_enable
    +int rx_buffer_len
    +struct pci_dev* pci_dev
    +void __iomem* bar[BAR_NUM]
    +dma_addr_t* tx_phys_addr_list
    +struct sk_buff** tx_skbuff
    +struct rc_rx_buffer* rx_buffer_info
    +u32 rx_next_to_alloc
    +struct pci_rc_vnet_queue* queue
    +struct pci_rc_vnet_tx_queue* tx_queue
    +struct pci_rc_vnet_rx_queue* rx_queue
    +struct net_device* netdev
    +int irq_type
    +int num_irqs
    +spinlock_t tx_lock
    +spinlock_t tx_reclaim_lock
    +spinlock_t rx_lock
    +struct params params
    +struct work_struct tx_timeout_task
    +int(*clean_ep2rc)(struct pci_rc_vnet_private* tp,int budget)
    +struct napi_struct tx_napi
    +struct napi_struct rx_napi
    +int tx_reclaim_start
    +int tx_reclaim_num
    +int rx_refill_start
    +struct hrtimer link_detect_timer
    +struct hrtimer receive_timer
    +struct hrtimer tx_poll_timer
    +void __iomem* msi_irq_addr
  }

  class pci_rc_vnet_queue {
    +struct pci_rc_vnet_tx_queue tx_queue
    +struct pci_rc_vnet_rx_queue rx_queue
  }

  class pci_rc_vnet_tx_queue {
    +u32 irq
    +u32 tail
    +u32 head
    +u32 nb_desc
    +u32 flags
    +struct pci_rc_vnet_dma_desc desc_ring[PCI_RC_VNET_DMA_BUFF_NUM]
  }

  class pci_rc_vnet_rx_queue {
    +u32 irq
    +u32 tail
    +u32 head
    +u32 nb_desc
    +u32 flags
    +struct pci_rc_vnet_dma_desc desc_ring[PCI_RC_VNET_DMA_BUFF_NUM]
  }

  class pci_rc_vnet_dma_desc {
    +u64 addr
    +u64 ctrl
  }

  class rc_rx_buffer {
    +dma_addr_t addr
    +struct page* page
    +u16 page_offset
    +u16 pagecnt_bias
  }

  class params {
    +struct param_range rx_ring
    +struct param_range tx_ring
  }

  class param_range {
    +u32 min
    +u32 max
    +u32 count
  }

  pci_rc_vnet_private --> pci_rc_vnet_queue : queue
  pci_rc_vnet_queue --> pci_rc_vnet_tx_queue : tx_queue
  pci_rc_vnet_queue --> pci_rc_vnet_rx_queue : rx_queue
  pci_rc_vnet_tx_queue --> pci_rc_vnet_dma_desc : desc_ring
  pci_rc_vnet_rx_queue --> pci_rc_vnet_dma_desc : desc_ring
  pci_rc_vnet_private --> rc_rx_buffer : rx_buffer_info
  pci_rc_vnet_private --> params : params
Loading

Class diagram for updated Phytium MAC driver structures

classDiagram
  class phyinit_cfg {
    +u64 phy_domain
    +u64 phy_multiplex
    +u64 phy_mode
    +u64 phy_speed
  }

  class phytmac_hw_if {
    +int(*reset_hw)(struct phytmac* pdata)
    +int(*powerup_hw)(struct phytmac* pdata,int on)
    +int(*mac_linkup)(struct phytmac* pdata,phy_interface_t interface,int speed,int duplex)
    +void(*enable_pause)(struct phytmac* pdata,int rx_pause)
    +void(*disable_tx)(struct phytmac* pdata)
    +void(*disable_rx)(struct phytmac* pdata)
    +void(*phy_speed_switch)(struct phytmac* pdata,int speed)
    +int(*enable_mdio_control)(struct phytmac* pdata,int enable)
    +int(*mdio_read)(struct phytmac* pdata,int mii_id,int regnum)
    +int(*mdio_write)(struct phytmac* pdata,int mii_id,int regnum,u16 value)
  }

  class phytmac {
    +struct net_device* ndev
    +struct device* dev
    +struct phytmac_hw_if* hw_if
    +int pause
    +phy_interface_t phy_interface
    +enum phytmac_interface phytmac_v2_interface
    +int ori_speed
    +int speed
    +int duplex
    +int autoneg
    +unsigned long capacities
    +spinlock_t lock
  }

  class phytmac_1p0_hw {
    +struct phytmac_hw_if phytmac_1p0_hw
  }

  phytmac_hw_if <.. phytmac_1p0_hw : instance
  phytmac --> phytmac_hw_if : hw_if
  phytmac_1p0_hw ..> phyinit_cfg : uses_for_smc
Loading

File-Level Changes

Change Details Files
Add SMC-based PHY speed switching support for Phytium v1 MAC and plumb SGMII speed switching through phylink.
  • Introduce arm-smccc dependency and implement phytmac_phy_speed_switch using PHY_INIT_SMC_ID to program PHY speed via firmware for MAC0/MAC1
  • Wire new phy_speed_switch callback into phytmac_1p0_hw and call it on link up for SGMII when a PHY is present, with logic to avoid redundant or 1G/100/10 mutual switching
  • Track original link speed in struct phytmac and guard SGMII speed switch by interface type and MAC version
  • Adjust SGMII autonegotiation: disable autoneg for 2.5G and enable it for 1G/100M/10M in both v1 and v2 paths
drivers/net/ethernet/phytium/phytmac_v1.c
drivers/net/ethernet/phytium/phytmac_main.c
drivers/net/ethernet/phytium/phytmac.h
drivers/net/ethernet/phytium/phytmac_v1.h
Fix MMIO access and MDIO/MAC feature handling in Phytium v2 MAC driver.
  • Replace memcpy/memcpy_to/from regular memory with memcpy_toio/memcpy_fromio for message ring register accesses
  • Move MDC clock configuration from init path to enable_mdio so MDC is programmed when MDIO is enabled
  • Remove unused local variable and associated SET_MDC send from init_hw
  • Use memcpy_fromio consistently when reading MAC address, feature, and register dump payloads
drivers/net/ethernet/phytium/phytmac_v2.c
Correct power control and ACPI usage for Phytium MACs and LED driver.
  • Wrap ACPI-specific variables and calls in CONFIG_ACPI guards in phytmac_powerup_hw for v1 and v2 to avoid build issues when ACPI is disabled
  • Similarly guard ACPI-based LED netdev initialization and only call acpi_ndev_init when CONFIG_ACPI is enabled
  • Preserve existing runtime behavior when ACPI is present while making the code safe for non-ACPI builds
drivers/net/ethernet/phytium/phytmac_v1.c
drivers/net/ethernet/phytium/phytmac_v2.c
drivers/char/phytnetled/phytnet_led.c
Extend TSO capabilities to cover IPv6 and tighten alignment checks for Phytium and Cadence MAC drivers.
  • Treat misaligned payload or fragments as disabling both NETIF_F_TSO and NETIF_F_TSO6 in phytmac_features_check
  • Advertise both NETIF_F_TSO and NETIF_F_TSO6 in phytmac_default_config when LSO capability exists
  • Update MACB driver MACB_NETIF_LSO macro to include TSO6
  • Ensure TX ring cleanup in macb_mac_link_down uses spin_lock_bh/spin_unlock_bh instead of plain spin_lock/unlock
drivers/net/ethernet/phytium/phytmac_main.c
drivers/net/ethernet/phytium/phytmac.h
drivers/net/ethernet/cadence/macb_main.c
Reorganize Phytium vendor Makefile entries and introduce a new Phytium PCI virtual network driver (EP and RC sides).
  • Move NET_VENDOR_PHYTIUM object line earlier and add new NET_VENDOR_PHYTIUM PCI vnet line while avoiding duplicate vendor stanza
  • Add new driver subtree drivers/net/ethernet/phytium-pci-vnet with common Makefile and per-side Kconfigs/Makefiles
  • Implement pci_epf_vnet EP-side driver: a PCI endpoint function exposing a virtual netdev over PCIe with DMA-based TX/RX rings shared via BARs, NAPI-based RX, link detection timer, ACPI/Phytium HPB MSI wiring, and a character device for host memory readback via DMA
  • Implement pci_rc_vnet RC-side driver: a PCI function driver that maps the EP-shared queues via BARs, allocates page-based RX buffers and DMA-mapped TX buffers, uses hrtimers to poll link/RX/TX reclaim, and exposes a normal netdev with ethtool support
  • Introduce shared queue/descriptor structures, DMA control field macros, and configuration helpers for both EP and RC, including CRC-based integrity checking and page reuse logic for RX
drivers/net/ethernet/Makefile
drivers/net/ethernet/phytium-pci-vnet/Makefile
drivers/net/ethernet/phytium-pci-vnet/pci-ep-net/Makefile
drivers/net/ethernet/phytium-pci-vnet/pci-rc-net/Makefile
drivers/net/ethernet/phytium-pci-vnet/pci-ep-net/pci_epf_vnet.c
drivers/net/ethernet/phytium-pci-vnet/pci-rc-net/pci_rc_vnet.c
drivers/net/ethernet/phytium-pci-vnet/pci-ep-net/pci_epf_vnet.h
drivers/net/ethernet/phytium-pci-vnet/pci-rc-net/pci_rc_vnet.h

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Hi @mamingrui123. Thanks for your PR.

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Hey - I've found 1 issue, and left some high level feedback:

  • The new multi-buffer RX handling in phytmac_rx() should use IS_ERR()/PTR_ERR() when interpreting the return from phytmac_rx_mbuffer(), otherwise applying PTR_ERR() unconditionally to a valid skb pointer is unsafe and could misbehave if phytmac_rx_mbuffer() ever returns other ERR_PTR codes.
  • The EP virtual net driver relies on a single global epf_cdev_mdata (including the cdev, page and phys_addr) for its char-device interface; consider making this state per-EPF instance to avoid conflicts or incorrect behaviour when multiple endpoints are present.
  • phytmac_phy_speed_switch() matches MAC instances via hard-coded physical base addresses (MAC0_ADDR_BASE/MAC1_ADDR_BASE) taken from ndev->base_addr; this is fragile if the mapping changes or the driver is reused on other SoCs, so it would be more robust to key the MAC ID off driver-internal configuration rather than fixed physical constants.
Prompt for AI Agents
Please address the comments from this code review:

## Overall Comments
- The new multi-buffer RX handling in phytmac_rx() should use IS_ERR()/PTR_ERR() when interpreting the return from phytmac_rx_mbuffer(), otherwise applying PTR_ERR() unconditionally to a valid skb pointer is unsafe and could misbehave if phytmac_rx_mbuffer() ever returns other ERR_PTR codes.
- The EP virtual net driver relies on a single global epf_cdev_mdata (including the cdev, page and phys_addr) for its char-device interface; consider making this state per-EPF instance to avoid conflicts or incorrect behaviour when multiple endpoints are present.
- phytmac_phy_speed_switch() matches MAC instances via hard-coded physical base addresses (MAC0_ADDR_BASE/MAC1_ADDR_BASE) taken from ndev->base_addr; this is fragile if the mapping changes or the driver is reused on other SoCs, so it would be more robust to key the MAC ID off driver-internal configuration rather than fixed physical constants.

## Individual Comments

### Comment 1
<location path="drivers/net/ethernet/phytium-pci-vnet/pci-ep-net/pci_epf_vnet.c" line_range="1198" />
<code_context>
+	u64 new_len = size + offset;
+	u64 read_len = 0;
+	u8 *ori_addr = bmcaddr;
+	void *vaddr = memremap(epf_cdev_mdata.phys_addr, MEM_MAX, MEMREMAP_WB);
+
+	while (new_len) {
</code_context>
<issue_to_address>
**issue (bug_risk):** memremap is being used on a DMA address, not a CPU physical address, which is not generally valid.

`epf_cdev_mdata.phys_addr` comes from `dma_map_page_attrs`, so it’s a DMA address, not a guaranteed CPU physical address (especially with an IOMMU). Using `memremap` on it is unsafe. To get a CPU-mappable address for `memremap`, derive a true physical address from the page (e.g. `page_to_phys(epf_cdev_mdata.page)`), or better, avoid `memremap` and reuse the existing kernel virtual mapping of the allocated page instead.
</issue_to_address>

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u64 new_len = size + offset;
u64 read_len = 0;
u8 *ori_addr = bmcaddr;
void *vaddr = memremap(epf_cdev_mdata.phys_addr, MEM_MAX, MEMREMAP_WB);
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issue (bug_risk): memremap is being used on a DMA address, not a CPU physical address, which is not generally valid.

epf_cdev_mdata.phys_addr comes from dma_map_page_attrs, so it’s a DMA address, not a guaranteed CPU physical address (especially with an IOMMU). Using memremap on it is unsafe. To get a CPU-mappable address for memremap, derive a true physical address from the page (e.g. page_to_phys(epf_cdev_mdata.page)), or better, avoid memremap and reuse the existing kernel virtual mapping of the allocated page instead.

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Pull request overview

This PR updates Phytium Ethernet support and adds a new Phytium PCIe virtual networking stack (EP/RC) intended for PCIe-based datapath configurations, while also refining feature advertisement, link handling, and some platform/ACPI guards.

Changes:

  • Extend Phytium MAC support (SGMII speed switching hook, RX multi-buffer handling, feature updates including TSO6, and MMIO-safe message ring access).
  • Introduce new Phytium PCI virtual Ethernet drivers for Root Complex and Endpoint sides, plus Kconfig/Makefile integration.
  • Minor related network driver updates (MACB TSO6 advertisement + link-down TX cleanup) and ACPI-guarded LED initialization.

Reviewed changes

Copilot reviewed 19 out of 19 changed files in this pull request and generated 14 comments.

Show a summary per file
File Description
drivers/net/ethernet/phytium/phytmac.h Bump driver version; add SMC/PHY init definitions; add ori_speed and hw hook for PHY speed switching.
drivers/net/ethernet/phytium/phytmac_v2.c Use memcpy_{to,from}io for MMIO rings; adjust MDC handling; CONFIG_ACPI guards; SGMII autoneg toggle fix.
drivers/net/ethernet/phytium/phytmac_v1.h Add MAC base address constants used for SMCCC speed switching selection.
drivers/net/ethernet/phytium/phytmac_v1.c Add SMCCC-based PHY speed switching and plumb it into hw interface; CONFIG_ACPI guard; SGMII autoneg toggle fix.
drivers/net/ethernet/phytium/phytmac_main.c Fix RX multi-buffer loop behavior with -EAGAIN; add SGMII speed-switch plumbing; extend TSO alignment checks and advertise TSO6.
drivers/net/ethernet/phytium-pci-vnet/Kconfig Add menu and vendor option for Phytium PCI virtual Ethernet drivers.
drivers/net/ethernet/phytium-pci-vnet/Makefile Build integration for EP and RC subdrivers.
drivers/net/ethernet/phytium-pci-vnet/pci-rc-net/Kconfig Add RC-side virtual Ethernet Kconfig option.
drivers/net/ethernet/phytium-pci-vnet/pci-rc-net/Makefile Build integration for RC driver object.
drivers/net/ethernet/phytium-pci-vnet/pci-rc-net/pci_rc_vnet.h Add RC driver interface/structures/constants.
drivers/net/ethernet/phytium-pci-vnet/pci-rc-net/pci_rc_vnet.c Add RC-side virtual netdev implementation (DMA queues + timers + ethtool).
drivers/net/ethernet/phytium-pci-vnet/pci-ep-net/Kconfig Add EP-side virtual Ethernet Kconfig option.
drivers/net/ethernet/phytium-pci-vnet/pci-ep-net/Makefile Build integration for EP driver object.
drivers/net/ethernet/phytium-pci-vnet/pci-ep-net/pci_epf_vnet.h Add EPF driver interface/structures/constants, including cdev interface.
drivers/net/ethernet/phytium-pci-vnet/pci-ep-net/pci_epf_vnet.c Add EP-side virtual netdev + EPF binding + DMA engine interactions + cdev/ioctl path.
drivers/net/ethernet/Makefile Wire Phytium vendor directory and new Phytium PCI vnet directory into ethernet build.
drivers/net/ethernet/Kconfig Source new Phytium and Phytium PCI vnet Kconfigs (but currently duplicates xircom include).
drivers/net/ethernet/cadence/macb_main.c Advertise TSO6 alongside TSO; use spin_lock_bh in link-down TX cleanup.
drivers/char/phytnetled/phytnet_led.c Guard ACPI-only LED/netdev init paths with CONFIG_ACPI.

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if (pdata->xdp_prog)
netdev_warn(pdata->ndev, "xdp does not support multiple buffers!!\n");
skb = phytmac_rx_mbuffer(queue);
if (PTR_ERR(skb) == -EAGAIN) {
Comment on lines 168 to 173
source "drivers/net/ethernet/pensando/Kconfig"
source "drivers/net/ethernet/phytium/Kconfig"
source "drivers/net/ethernet/phytium-pci-vnet/Kconfig"
source "drivers/net/ethernet/qlogic/Kconfig"
source "drivers/net/ethernet/xircom/Kconfig"
source "drivers/net/ethernet/brocade/Kconfig"
hrtimer_start(&tp->receive_timer, ns_to_ktime(PCI_RC_VNET_RECEIVE_PERIOD_NS),
HRTIMER_MODE_REL_SOFT);
hrtimer_start(&tp->tx_poll_timer, ns_to_ktime(PCI_RC_VNET_TX_POLL_PERIOD_NS),
HRTIMER_MODE_REL_SOFT);
Comment on lines +543 to +581
static int pci_rc_vnet_rx(struct pci_rc_vnet_private *tp, u32 head, u32 tail)
{
u32 desc_crc, pkt_crc;
int used;
u64 ctrl;
int pkt_len;
void *pkt_data;

struct rc_rx_buffer *rx_buffer_info;
struct pci_rc_vnet_rx_queue *rx_queue;
struct pci_rc_vnet_dma_desc *rx_desc_ring;
struct sk_buff *skb;
int ring_size = tp->params.tx_ring.count;
unsigned int pkt_num, count = 0;

rx_queue = tp->rx_queue;
rx_desc_ring = rx_queue->desc_ring;

if (tail >= head)
pkt_num = tail - head;
else
pkt_num = ring_size - head + tail;

for (count = 0; count < pkt_num; count++) {
/* Ensure ctrl is at least as up-to-date as rxused */
dma_rmb();

ctrl = rx_desc_ring[head].ctrl;
used = PCI_RC_VNET_DMA_DESC_FIELD_GET(USED, ctrl);

pkt_len = PCI_RC_VNET_DMA_DESC_FIELD_GET(PKT_LEN, ctrl);

/* No package to receive */
if (!used)
break;

/* get rx buffer */
rx_buffer_info = &tp->rx_buffer_info[head & (ring_size - 1)];
if (!rx_buffer_info->page) {
Comment on lines +663 to +671
static void pci_rc_vnet_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
{
switch (stringset) {
case ETH_SS_TEST:
memcpy(data, *pci_rc_vnet_gstrings_test, sizeof(pci_rc_vnet_gstrings_test));
break;
case ETH_SS_STATS:
memcpy(data, *pci_rc_vnet_gstrings_stats, sizeof(pci_rc_vnet_gstrings_stats));
break;
EP_TX_PAGE_SIZE,
DMA_FROM_DEVICE, EP_DMA_ATTR);
if (dma_mapping_error(epc->dev.parent, paddr)) {
netdev_err(vnet->netdev, "tx map page failed\n");
int timeout;
unsigned long lock_flags;

if (len < 0 || len > MEM_MAX)
Comment on lines +1134 to +1142
static int epf_cdev_mmap(struct file *filp, struct vm_area_struct *vma)
{
unsigned long pfn = epf_cdev_mdata.phys_addr >> PAGE_SHIFT;
unsigned long size = vma->vm_end - vma->vm_start;

if (remap_pfn_range(vma, vma->vm_start, pfn, size, vma->vm_page_prot))
return -EAGAIN;

return 0;
continue;

dma_unmap_page_attrs(epc->dev.parent, tx_buffer_info->addr,
EP_RX_PAGE_SIZE, DMA_FROM_DEVICE, EP_DMA_ATTR);
Comment on lines +1196 to +1202
u64 read_len = 0;
u8 *ori_addr = bmcaddr;
void *vaddr = memremap(epf_cdev_mdata.phys_addr, MEM_MAX, MEMREMAP_WB);

while (new_len) {
if (new_len >= MEM_MAX)
read_len = MEM_MAX;
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3 participants