From ee878e30e5b9d0f2bca91611401c458ac2578359 Mon Sep 17 00:00:00 2001 From: Ivan Boldyrev Date: Tue, 14 Apr 2026 18:16:05 +0200 Subject: [PATCH 1/4] AARCHMRS-2026-03 --- aarchmrs-gen/src/downloads.rs | 10 +++++----- aarchmrs-gen/src/lib.rs | 8 ++++---- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/aarchmrs-gen/src/downloads.rs b/aarchmrs-gen/src/downloads.rs index 333e41f..120d088 100644 --- a/aarchmrs-gen/src/downloads.rs +++ b/aarchmrs-gen/src/downloads.rs @@ -7,7 +7,7 @@ use std::io; use std::path::{Path, PathBuf}; use crate::{ - AARCHMRS_2025_12_FILE, AARCHMRS_2025_12_MD5, AARCHMRS_2025_12_SIZE, AARCHMRS_2025_12_URL, + AARCHMRS_2026_03_FILE, AARCHMRS_2026_03_MD5, AARCHMRS_2026_03_SIZE, AARCHMRS_2026_03_URL, }; use md5::{Digest, Md5}; @@ -20,7 +20,7 @@ pub enum DownloadError { } pub(crate) fn ensure_archive(cache_dir: &Path) -> Result { - let archive_file = cache_dir.join(AARCHMRS_2025_12_FILE); + let archive_file = cache_dir.join(AARCHMRS_2026_03_FILE); if !is_valid_archive(&archive_file) { eprintln!("Downloading an archive file..."); download_archive(&archive_file)?; @@ -37,7 +37,7 @@ fn download_archive(archive_file: &Path) -> Result<(), DownloadError> { let _ = std::fs::remove_file(archive_file); let _ = std::fs::remove_dir(archive_file); - let mut req = ureq::get(AARCHMRS_2025_12_URL).call()?; + let mut req = ureq::get(AARCHMRS_2026_03_URL).call()?; let mut body_reader = req.body_mut().as_reader(); let mut out_file = std::fs::File::create(archive_file)?; @@ -53,7 +53,7 @@ fn is_valid_archive(archive_file: &Path) -> bool { Ok(mut file) => { match file.metadata() { Ok(metadata) => { - if metadata.len() != AARCHMRS_2025_12_SIZE { + if metadata.len() != AARCHMRS_2026_03_SIZE { return false; } if !metadata.is_file() { @@ -70,7 +70,7 @@ fn is_valid_archive(archive_file: &Path) -> bool { }; let md5 = hasher.finalize(); - md5[..] == AARCHMRS_2025_12_MD5 + md5[..] == AARCHMRS_2026_03_MD5 } Err(_err) => false, } diff --git a/aarchmrs-gen/src/lib.rs b/aarchmrs-gen/src/lib.rs index aecb83b..9518217 100644 --- a/aarchmrs-gen/src/lib.rs +++ b/aarchmrs-gen/src/lib.rs @@ -20,10 +20,10 @@ mod encoding; mod generation; mod stack; -pub const AARCHMRS_2025_12_URL: &str = "https://developer.arm.com/-/cdn-downloads/permalink/Exploration-Tools-OS-Machine-Readable-Data/AARCHMRS_BSD/AARCHMRS_OPENSOURCE_A_profile_FAT-2025-12.tar.gz"; -pub const AARCHMRS_2025_12_FILE: &str = "AARCHMRS_OPENSOURCE_A_profile_FAT-2025-12.tar.gz"; -pub const AARCHMRS_2025_12_MD5: [u8; 16] = hex_literal::hex!("89828523b3ec54597d23a1bd1cf483e7"); -pub const AARCHMRS_2025_12_SIZE: u64 = 5_371_270; +pub const AARCHMRS_2026_03_URL: &str = "https://developer.arm.com/-/cdn-downloads/permalink/Exploration-Tools-OS-Machine-Readable-Data/AARCHMRS_BSD/AARCHMRS_OPENSOURCE_A_profile_FAT-2026-03.tar.gz"; +pub const AARCHMRS_2026_03_FILE: &str = "AARCHMRS_OPENSOURCE_A_profile_FAT-2026-03.tar.gz"; +pub const AARCHMRS_2026_03_MD5: [u8; 16] = hex_literal::hex!("bffb39150432bb7e15be722a29625d0c"); +pub const AARCHMRS_2026_03_SIZE: u64 = 5_341_284; pub const AARCHMRS_INSTRUCTIONS_FILE: &str = "Instructions.json"; const FEATURES: [&str; 3] = ["A64", "A32", "T32"]; From fe3aba7efa7b857ee24ed722245e13cafb128e7a Mon Sep 17 00:00:00 2001 From: Ivan Boldyrev Date: Tue, 14 Apr 2026 18:20:56 +0200 Subject: [PATCH 2/4] gen: Allow using a downloaded file --- aarchmrs-gen/src/downloads.rs | 2 +- aarchmrs-gen/src/lib.rs | 16 +++++++++++++++- tools/aarchmrs-generate/src/main.rs | 8 +++++++- 3 files changed, 23 insertions(+), 3 deletions(-) diff --git a/aarchmrs-gen/src/downloads.rs b/aarchmrs-gen/src/downloads.rs index 120d088..f380ae3 100644 --- a/aarchmrs-gen/src/downloads.rs +++ b/aarchmrs-gen/src/downloads.rs @@ -45,7 +45,7 @@ fn download_archive(archive_file: &Path) -> Result<(), DownloadError> { Ok(()) } -fn is_valid_archive(archive_file: &Path) -> bool { +pub(crate) fn is_valid_archive(archive_file: &Path) -> bool { if !std::fs::exists(archive_file).unwrap_or(false) { return false; } diff --git a/aarchmrs-gen/src/lib.rs b/aarchmrs-gen/src/lib.rs index 9518217..93e34de 100644 --- a/aarchmrs-gen/src/lib.rs +++ b/aarchmrs-gen/src/lib.rs @@ -3,12 +3,14 @@ * This document is licensed under the BSD 3-clause license. */ +use std::borrow::Cow; use std::io; use std::path::Path; use aarchmrs_parser::instructions::{ Encodeset, InstructionGroup, InstructionGroupOrInstruction, License, }; +use downloads::is_valid_archive; use itertools::Itertools; use proc_macro2::TokenStream; @@ -33,8 +35,20 @@ pub fn gen_instructions( cache_dir: &Path, r#mod: bool, doc_file: Option<&Path>, + archive_path: Option<&Path>, ) -> Result<(), DownloadError> { - let archive_path = ensure_archive(cache_dir)?; + let archive_path = match archive_path { + Some(archive_path) => { + if is_valid_archive(archive_path) { + Cow::Borrowed(archive_path) + } else { + return Err(DownloadError::Io(io::Error::other( + "The archive file doesn't match the parameters or doesn't exist", + ))); + } + } + None => Cow::Owned(ensure_archive(cache_dir)?), + }; let gz_archive_file = std::fs::File::open(archive_path)?; let tar_file = flate2::read::GzDecoder::new(gz_archive_file); diff --git a/tools/aarchmrs-generate/src/main.rs b/tools/aarchmrs-generate/src/main.rs index 738530a..c0cd81e 100644 --- a/tools/aarchmrs-generate/src/main.rs +++ b/tools/aarchmrs-generate/src/main.rs @@ -8,8 +8,13 @@ use std::path::PathBuf; #[derive(Parser, Debug)] struct Args { - #[clap(long)] + #[clap( + long, + help = "Generate mod.rs instead of lib.rs file for the root module" + )] r#mod: bool, + #[clap(long, help = "Archive file")] + archive_file: Option, #[clap(long)] temp_dir: Option, #[clap(long)] @@ -26,6 +31,7 @@ fn main() -> eyre::Result<()> { &temp_dir, args.r#mod, args.doc_file.as_deref(), + args.archive_file.as_deref(), ) .unwrap(); From 4832bd4c373168b3e24ea3fe9a5f1851182053d1 Mon Sep 17 00:00:00 2001 From: Ivan Boldyrev Date: Tue, 14 Apr 2026 18:27:42 +0200 Subject: [PATCH 3/4] instructions: Regenerate data --- aarchmrs-instructions/README.md | 2 +- aarchmrs-instructions/src/A32.rs | 2 +- aarchmrs-instructions/src/A32/brblk.rs | 2 +- aarchmrs-instructions/src/A32/brblk/b_imm.rs | 2 +- .../src/A32/brblk/ldstexcept.rs | 2 +- aarchmrs-instructions/src/A32/brblk/ldstm.rs | 2 +- aarchmrs-instructions/src/A32/cops_as.rs | 2 +- .../src/A32/cops_as/advsimdext.rs | 2 +- .../src/A32/cops_as/advsimdext/floatdpmac.rs | 2 +- .../src/A32/cops_as/advsimdext/fpcsel.rs | 2 +- .../src/A32/cops_as/advsimdext/fpcvtrnd.rs | 2 +- .../src/A32/cops_as/advsimdext/fpextins.rs | 2 +- .../src/A32/cops_as/advsimdext/fpminmaxnm.rs | 2 +- .../cops_as/advsimdext/simd3reg_sameext.rs | 2 +- .../A32/cops_as/advsimdext/simd_dotprod.rs | 2 +- aarchmrs-instructions/src/A32/cops_as/fpdp.rs | 2 +- .../src/A32/cops_as/fpdp/fpdp2reg.rs | 2 +- .../src/A32/cops_as/fpdp/fpdp3reg.rs | 2 +- .../src/A32/cops_as/fpdp/fpimm.rs | 2 +- .../src/A32/cops_as/svcall.rs | 2 +- .../src/A32/cops_as/svcall/svc.rs | 2 +- .../src/A32/cops_as/sys_mov32.rs | 2 +- .../src/A32/cops_as/sys_mov32/movcpgp32.rs | 2 +- .../src/A32/cops_as/sys_mov32/movfpgp16.rs | 2 +- .../src/A32/cops_as/sys_mov32/movfpgp32.rs | 2 +- .../src/A32/cops_as/sys_mov32/movfpsr.rs | 2 +- .../src/A32/cops_as/sys_mov32/movsimdgp.rs | 2 +- .../src/A32/cops_as/sysldst_mov64.rs | 2 +- .../src/A32/cops_as/sysldst_mov64/ldstcp.rs | 2 +- .../A32/cops_as/sysldst_mov64/ldstsimdfp.rs | 2 +- .../A32/cops_as/sysldst_mov64/movcpgp64.rs | 2 +- .../cops_as/sysldst_mov64/movsimdfpgp64.rs | 2 +- aarchmrs-instructions/src/A32/dp.rs | 2 +- aarchmrs-instructions/src/A32/dp/dpimm.rs | 2 +- .../src/A32/dp/dpimm/intdp1reg_imm.rs | 2 +- .../src/A32/dp/dpimm/intdp2reg_imm.rs | 2 +- .../src/A32/dp/dpimm/log2reg_imm.rs | 2 +- .../src/A32/dp/dpimm/movsr_hint_imm.rs | 2 +- .../src/A32/dp/dpimm/movw.rs | 2 +- aarchmrs-instructions/src/A32/dp/dpmisc.rs | 2 +- .../src/A32/dp/dpmisc/blx_reg.rs | 2 +- .../src/A32/dp/dpmisc/bx_reg.rs | 2 +- .../src/A32/dp/dpmisc/bxj_reg.rs | 2 +- .../src/A32/dp/dpmisc/clz.rs | 2 +- .../src/A32/dp/dpmisc/crc32.rs | 2 +- .../src/A32/dp/dpmisc/eret.rs | 2 +- .../src/A32/dp/dpmisc/except.rs | 2 +- .../src/A32/dp/dpmisc/intsat.rs | 2 +- .../src/A32/dp/dpmisc/movsr_reg.rs | 2 +- aarchmrs-instructions/src/A32/dp/dpregis.rs | 2 +- .../src/A32/dp/dpregis/intdp2reg_immsh.rs | 2 +- .../src/A32/dp/dpregis/intdp3reg_immsh.rs | 2 +- .../src/A32/dp/dpregis/logic3reg_immsh.rs | 2 +- aarchmrs-instructions/src/A32/dp/dpregrs.rs | 2 +- .../src/A32/dp/dpregrs/intdp2reg_regsh.rs | 2 +- .../src/A32/dp/dpregrs/intdp3reg_regsh.rs | 2 +- .../src/A32/dp/dpregrs/logic3reg_regsh.rs | 2 +- aarchmrs-instructions/src/A32/dp/mul_half.rs | 2 +- aarchmrs-instructions/src/A32/dp/mul_word.rs | 2 +- aarchmrs-instructions/src/A32/dp/sync.rs | 2 +- .../src/A32/dp/sync/ldst_excl.rs | 2 +- aarchmrs-instructions/src/A32/dp/xldst.rs | 2 +- .../src/A32/dp/xldst/ldstximm.rs | 2 +- .../src/A32/dp/xldst/ldstxreg.rs | 2 +- aarchmrs-instructions/src/A32/ldstimm.rs | 2 +- aarchmrs-instructions/src/A32/ldstreg.rs | 2 +- aarchmrs-instructions/src/A32/media.rs | 2 +- aarchmrs-instructions/src/A32/media/bfi.rs | 2 +- aarchmrs-instructions/src/A32/media/bfx.rs | 2 +- aarchmrs-instructions/src/A32/media/extend.rs | 2 +- aarchmrs-instructions/src/A32/media/pack.rs | 2 +- .../src/A32/media/parallel.rs | 2 +- .../src/A32/media/reverse.rs | 2 +- aarchmrs-instructions/src/A32/media/sat16.rs | 2 +- aarchmrs-instructions/src/A32/media/sat32.rs | 2 +- .../src/A32/media/selbytes.rs | 2 +- .../src/A32/media/smul_div.rs | 2 +- aarchmrs-instructions/src/A32/media/udf.rs | 2 +- aarchmrs-instructions/src/A32/media/usad.rs | 2 +- aarchmrs-instructions/src/A32/uncond_as.rs | 2 +- .../src/A32/uncond_as/advsimddp.rs | 2 +- .../A32/uncond_as/advsimddp/a_simd_12reg.rs | 2 +- .../advsimddp/a_simd_12reg/simd1reg_imm.rs | 2 +- .../advsimddp/a_simd_12reg/simd2reg_shift.rs | 2 +- .../A32/uncond_as/advsimddp/a_simd_mulreg.rs | 2 +- .../advsimddp/a_simd_mulreg/simd2reg_dup.rs | 2 +- .../advsimddp/a_simd_mulreg/simd2reg_misc.rs | 2 +- .../a_simd_mulreg/simd2reg_scalar.rs | 2 +- .../advsimddp/a_simd_mulreg/simd3reg_diff.rs | 2 +- .../advsimddp/a_simd_mulreg/simd3reg_ext.rs | 2 +- .../advsimddp/a_simd_mulreg/simd3reg_tbl.rs | 2 +- .../A32/uncond_as/advsimddp/simd3reg_same.rs | 2 +- .../src/A32/uncond_as/advsimdls.rs | 2 +- .../src/A32/uncond_as/advsimdls/ldstv_ms.rs | 2 +- .../A32/uncond_as/advsimdls/ldstv_ssone.rs | 2 +- .../src/A32/uncond_as/advsimdls/ldv_ssall.rs | 2 +- .../src/A32/uncond_as/uncondhints.rs | 2 +- .../src/A32/uncond_as/uncondhints/barriers.rs | 2 +- .../A32/uncond_as/uncondhints/preload_imm.rs | 2 +- .../A32/uncond_as/uncondhints/preload_reg.rs | 2 +- .../uncondhints/uncondhints_UNPRED_0.rs | 2 +- .../uncondhints/uncondhints_UNPRED_1.rs | 2 +- .../uncondhints/uncondhints_UNPRED_2.rs | 2 +- .../uncondhints/uncondhints_UNPRED_3.rs | 2 +- .../src/A32/uncond_as/uncondmisc.rs | 2 +- .../src/A32/uncond_as/uncondmisc/cps.rs | 2 +- .../src/A32/uncond_as/uncondmisc/setpan.rs | 2 +- .../uncond_as/uncondmisc/uncondmisc_unpred.rs | 2 +- aarchmrs-instructions/src/A64.rs | 2 +- aarchmrs-instructions/src/A64/control.rs | 2 +- .../src/A64/control/barriers.rs | 2 +- .../src/A64/control/branch_imm.rs | 2 +- .../src/A64/control/branch_reg.rs | 2 +- .../src/A64/control/compbranch.rs | 2 +- .../src/A64/control/compbranch_imm.rs | 2 +- .../src/A64/control/compbranch_regs.rs | 2 +- .../src/A64/control/compbranch_regs2.rs | 2 +- .../src/A64/control/condbranch.rs | 2 +- .../src/A64/control/exception.rs | 2 +- .../src/A64/control/hints.rs | 70 +++++++++---------- .../src/A64/control/miscbranch.rs | 2 +- .../src/A64/control/pstate.rs | 2 +- .../src/A64/control/syspairinstrs.rs | 2 +- .../src/A64/control/systeminstrs.rs | 2 +- .../src/A64/control/systeminstrswithreg.rs | 2 +- .../src/A64/control/systemmove.rs | 2 +- .../src/A64/control/systemmovepr.rs | 2 +- .../src/A64/control/tchange_imm.rs | 2 +- .../src/A64/control/tchange_reg.rs | 2 +- .../src/A64/control/testbranch.rs | 2 +- aarchmrs-instructions/src/A64/dpimm.rs | 2 +- .../src/A64/dpimm/addsub_imm.rs | 2 +- .../src/A64/dpimm/addsub_immtags.rs | 2 +- .../src/A64/dpimm/bitfield.rs | 2 +- .../src/A64/dpimm/dp_1src_imm.rs | 2 +- .../src/A64/dpimm/extract.rs | 2 +- .../src/A64/dpimm/log_imm.rs | 2 +- .../src/A64/dpimm/minmax_imm.rs | 2 +- .../src/A64/dpimm/movewide.rs | 2 +- .../src/A64/dpimm/pcreladdr.rs | 2 +- aarchmrs-instructions/src/A64/dpreg.rs | 2 +- .../src/A64/dpreg/addsub_carry.rs | 2 +- .../src/A64/dpreg/addsub_ext.rs | 2 +- .../src/A64/dpreg/addsub_pt.rs | 2 +- .../src/A64/dpreg/addsub_shift.rs | 2 +- .../src/A64/dpreg/condcmp_imm.rs | 2 +- .../src/A64/dpreg/condcmp_reg.rs | 2 +- .../src/A64/dpreg/condsel.rs | 2 +- .../src/A64/dpreg/dp_1src.rs | 2 +- .../src/A64/dpreg/dp_2src.rs | 2 +- .../src/A64/dpreg/dp_3src.rs | 2 +- .../src/A64/dpreg/log_shift.rs | 2 +- aarchmrs-instructions/src/A64/dpreg/rmif.rs | 2 +- aarchmrs-instructions/src/A64/dpreg/setf.rs | 2 +- aarchmrs-instructions/src/A64/ldst.rs | 2 +- .../src/A64/ldst/asisdlse.rs | 2 +- .../src/A64/ldst/asisdlsep.rs | 2 +- .../src/A64/ldst/asisdlso.rs | 2 +- .../src/A64/ldst/asisdlsop.rs | 2 +- aarchmrs-instructions/src/A64/ldst/comswap.rs | 2 +- .../src/A64/ldst/comswap_unpriv.rs | 2 +- .../src/A64/ldst/comswappr.rs | 2 +- .../src/A64/ldst/comswappr_unpriv.rs | 2 +- .../src/A64/ldst/ldapstl_simd.rs | 2 +- .../src/A64/ldst/ldapstl_unscaled.rs | 2 +- .../src/A64/ldst/ldapstl_writeback.rs | 2 +- .../src/A64/ldst/ldiappstilp.rs | 2 +- .../src/A64/ldst/ldst_gcs.rs | 2 +- .../src/A64/ldst/ldst_immpost.rs | 2 +- .../src/A64/ldst/ldst_immpre.rs | 2 +- .../src/A64/ldst/ldst_pac.rs | 2 +- .../src/A64/ldst/ldst_pos.rs | 2 +- .../src/A64/ldst/ldst_regoff.rs | 2 +- .../src/A64/ldst/ldst_unpriv.rs | 2 +- .../src/A64/ldst/ldst_unscaled.rs | 2 +- .../src/A64/ldst/ldstexclp.rs | 2 +- .../src/A64/ldst/ldstexclr.rs | 2 +- .../src/A64/ldst/ldstexclr_unpriv.rs | 2 +- .../src/A64/ldst/ldstnapair_offs.rs | 2 +- aarchmrs-instructions/src/A64/ldst/ldstord.rs | 2 +- .../src/A64/ldst/ldstpair_off.rs | 2 +- .../src/A64/ldst/ldstpair_post.rs | 2 +- .../src/A64/ldst/ldstpair_pre.rs | 2 +- .../src/A64/ldst/ldsttags.rs | 2 +- aarchmrs-instructions/src/A64/ldst/loadlit.rs | 2 +- aarchmrs-instructions/src/A64/ldst/memcms.rs | 2 +- aarchmrs-instructions/src/A64/ldst/memop.rs | 2 +- .../src/A64/ldst/memop_128.rs | 2 +- .../src/A64/ldst/memop_unpriv.rs | 2 +- .../src/A64/ldst/memset_go.rs | 2 +- .../src/A64/ldst/rcwcomswap.rs | 2 +- .../src/A64/ldst/rcwcomswappr.rs | 2 +- aarchmrs-instructions/src/A64/reserved.rs | 2 +- .../src/A64/reserved/perm_undef.rs | 2 +- aarchmrs-instructions/src/A64/simd_dp.rs | 2 +- .../src/A64/simd_dp/asimdall.rs | 2 +- .../src/A64/simd_dp/asimddiff.rs | 2 +- .../src/A64/simd_dp/asimdelem.rs | 2 +- .../src/A64/simd_dp/asimdext.rs | 2 +- .../src/A64/simd_dp/asimdimm.rs | 2 +- .../src/A64/simd_dp/asimdins.rs | 2 +- .../src/A64/simd_dp/asimdmisc.rs | 2 +- .../src/A64/simd_dp/asimdmiscfp16.rs | 2 +- .../src/A64/simd_dp/asimdperm.rs | 2 +- .../src/A64/simd_dp/asimdsame.rs | 2 +- .../src/A64/simd_dp/asimdsame2.rs | 2 +- .../src/A64/simd_dp/asimdsamefp16.rs | 2 +- .../src/A64/simd_dp/asimdshf.rs | 2 +- .../src/A64/simd_dp/asimdtbl.rs | 2 +- .../src/A64/simd_dp/asisddiff.rs | 2 +- .../src/A64/simd_dp/asisdelem.rs | 2 +- .../src/A64/simd_dp/asisdmisc.rs | 2 +- .../src/A64/simd_dp/asisdmiscfp16.rs | 2 +- .../src/A64/simd_dp/asisdone.rs | 2 +- .../src/A64/simd_dp/asisdpair.rs | 2 +- .../src/A64/simd_dp/asisdsame.rs | 2 +- .../src/A64/simd_dp/asisdsame2.rs | 2 +- .../src/A64/simd_dp/asisdsamefp16.rs | 2 +- .../src/A64/simd_dp/asisdshf.rs | 2 +- .../src/A64/simd_dp/crypto3_imm2.rs | 2 +- .../src/A64/simd_dp/crypto3_imm6.rs | 2 +- .../src/A64/simd_dp/crypto4.rs | 2 +- .../src/A64/simd_dp/cryptoaes.rs | 2 +- .../src/A64/simd_dp/cryptosha2.rs | 2 +- .../src/A64/simd_dp/cryptosha3.rs | 2 +- .../src/A64/simd_dp/cryptosha512_2.rs | 2 +- .../src/A64/simd_dp/cryptosha512_3.rs | 2 +- .../src/A64/simd_dp/float2fix.rs | 2 +- .../src/A64/simd_dp/float2int.rs | 2 +- .../src/A64/simd_dp/floatccmp.rs | 2 +- .../src/A64/simd_dp/floatcmp.rs | 2 +- .../src/A64/simd_dp/floatdp1.rs | 2 +- .../src/A64/simd_dp/floatdp2.rs | 2 +- .../src/A64/simd_dp/floatdp3.rs | 2 +- .../src/A64/simd_dp/floatimm.rs | 2 +- .../src/A64/simd_dp/floatsel.rs | 2 +- aarchmrs-instructions/src/A64/sme.rs | 2 +- .../src/A64/sme/mortlach2_64bit_prod4.rs | 2 +- .../mortlach_f64f64_prod4.rs | 2 +- .../mortlach_i16i64_prod4.rs | 2 +- .../src/A64/sme/mortlach2_misc_prod.rs | 2 +- .../mortlach_b16b16_prod.rs | 2 +- .../mortlach_bini32_prod.rs | 2 +- .../mortlach_f16f16_prod.rs | 2 +- .../mortlach_f8f16_prod.rs | 2 +- .../src/A64/sme/mortlach2_prod4.rs | 2 +- .../mortlach2_prod4/mortlach_b16b16_prod4.rs | 2 +- .../mortlach2_prod4/mortlach_b16f32_prod4.rs | 2 +- .../mortlach2_prod4/mortlach_f16f16_prod4.rs | 2 +- .../mortlach2_prod4/mortlach_f16f32_prod4.rs | 2 +- .../mortlach2_prod4/mortlach_f32f32_prod4.rs | 2 +- .../mortlach2_prod4/mortlach_f8f16_prod4.rs | 2 +- .../mortlach2_prod4/mortlach_f8f32_prod4.rs | 2 +- .../mortlach2_prod4/mortlach_i16i32_prod4.rs | 2 +- .../mortlach2_prod4/mortlach_i8i32_prod4.rs | 2 +- .../src/A64/sme/mortlach2_ss_prod.rs | 2 +- .../mortlach_b16b16_1in2ss_prod.rs | 2 +- .../mortlach_b16f32_2in4ss_prod.rs | 2 +- .../mortlach_f16f16_1in2ss_prod.rs | 2 +- .../mortlach_f16f32_2in4ss_prod.rs | 2 +- .../mortlach_f32f32_1in2ss_prod.rs | 2 +- .../mortlach_f8f16_2in4ss_prod.rs | 2 +- .../mortlach_f8f32_2in4ss_prod.rs | 2 +- .../mortlach_i16i32_2in4ss_prod.rs | 2 +- .../mortlach_i8i32_2in4ss_prod.rs | 2 +- .../src/A64/sme/mortlach_32bit_fp_prod.rs | 2 +- .../mortlach_b16f32_prod.rs | 2 +- .../mortlach_f16f32_prod.rs | 2 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.../mortlach_multi2_insert_ctg.rs | 2 +- .../mortlach_multi2_za_insert_ctg.rs | 2 +- .../mortlach_multi4_insert_ctg.rs | 2 +- .../mortlach_multi4_za_insert_ctg.rs | 2 +- .../src/A64/sme/mortlach_mem.rs | 2 +- .../sme/mortlach_mem/mortlach_contig_load.rs | 2 +- .../sme/mortlach_mem/mortlach_contig_qload.rs | 2 +- .../mortlach_mem/mortlach_contig_qstore.rs | 2 +- .../sme/mortlach_mem/mortlach_contig_store.rs | 2 +- .../sme/mortlach_mem/mortlach_ctxt_ldst.rs | 2 +- .../A64/sme/mortlach_mem/mortlach_zt_ldst.rs | 2 +- .../src/A64/sme/mortlach_mov_zt.rs | 2 +- .../mortlach_mov_zt/mortlach_extract_zt.rs | 2 +- .../sme/mortlach_mov_zt/mortlach_insert_zt.rs | 2 +- .../mortlach_mov_zt/mortlach_move_to_zt.rs | 2 +- .../src/A64/sme/mortlach_multi_array_1a.rs | 2 +- .../mortlach_multi1_zz_za_fma_long_sm.rs | 2 +- .../mortlach_multi1_zz_za_mla_long_long_sm.rs | 2 +- .../mortlach_multi1_zz_za_mla_long_sm.rs | 2 +- .../mortlach_multi2_z_za_2way_dot_sm.rs | 2 +- .../mortlach_multi2_z_za_4way_dot_sm.rs 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2 +- .../mortlach_multi4_zz_za_mla_long_long_sm.rs | 2 +- .../mortlach_multi4_zz_za_mla_long_sm.rs | 2 +- .../src/A64/sme/mortlach_multi_array_2a.rs | 2 +- .../mortlach_multi2_z_za_2way_dot_mm.rs | 2 +- .../mortlach_multi2_z_za_4way_dot_mm.rs | 2 +- .../mortlach_multi2_z_za_f16_mm.rs | 2 +- .../mortlach_multi2_z_za_float_mm.rs | 2 +- .../mortlach_multi2_z_za_fpdot_mm.rs | 2 +- .../mortlach_multi2_z_za_int_mm.rs | 2 +- .../mortlach_multi2_z_za_mixed_dot_mm.rs | 2 +- .../mortlach_multi2_zz_za_f16_mm.rs | 2 +- .../mortlach_multi2_zz_za_float_mm.rs | 2 +- .../mortlach_multi2_zz_za_fma_long_mm.rs | 2 +- ...tlach_multi2_zz_za_fp8_fma_long_long_mm.rs | 2 +- .../mortlach_multi2_zz_za_fp8_fma_long_mm.rs | 2 +- .../mortlach_multi2_zz_za_int_mm.rs | 2 +- .../mortlach_multi2_zz_za_mla_long_long_mm.rs | 2 +- .../mortlach_multi2_zz_za_mla_long_mm.rs | 2 +- .../src/A64/sme/mortlach_multi_array_2b.rs | 2 +- .../mortlach_multi4_z_za_2way_dot_mm.rs | 2 +- .../mortlach_multi4_z_za_4way_dot_mm.rs | 2 +- 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.../mortlach_multi2_fma_long_idx.rs | 2 +- .../mortlach_multi2_fp8_fdot_idx.rs | 2 +- .../mortlach_multi2_fp8_fma_long_idx.rs | 2 +- .../mortlach_multi2_fp8_fma_long_long_idx.rs | 2 +- .../mortlach_multi2_fp8_fvdot_idx_s.rs | 2 +- .../mortlach_multi2_mla_long_idx.rs | 2 +- .../mortlach_multi2_mla_long_long_idx_d.rs | 2 +- .../mortlach_multi2_mla_long_long_idx_s.rs | 2 +- .../mortlach_multi2_zza_idx_d.rs | 2 +- .../mortlach_multi2_zza_idx_h.rs | 2 +- .../mortlach_multi2_zza_idx_s.rs | 2 +- .../src/A64/sme/mortlach_multi_indexed_3.rs | 2 +- .../mortlach_multi4_fma_long_idx.rs | 2 +- .../mortlach_multi4_fp8_fdot_idx_h.rs | 2 +- .../mortlach_multi4_fp8_fma_long_idx.rs | 2 +- .../mortlach_multi4_fp8_fma_long_long_idx.rs | 2 +- .../mortlach_multi4_mla_long_idx.rs | 2 +- .../mortlach_multi4_mla_long_long_idx_d.rs | 2 +- .../mortlach_multi4_mla_long_long_idx_s.rs | 2 +- .../mortlach_multi4_zza_idx_d.rs | 2 +- .../mortlach_multi4_zza_idx_h.rs | 2 +- .../mortlach_multi4_zza_idx_s.rs | 2 +- .../src/A64/sme/mortlach_multi_mem_ctg.rs | 2 +- .../mortlach_multi2_cld_cldnt_si_ctg.rs | 2 +- .../mortlach_multi2_cld_cldnt_ss_ctg.rs | 2 +- .../mortlach_multi2_cst_cstnt_si_ctg.rs | 2 +- .../mortlach_multi2_cst_cstnt_ss_ctg.rs | 2 +- .../mortlach_multi4_cld_cldnt_si_ctg.rs | 2 +- .../mortlach_multi4_cld_cldnt_ss_ctg.rs | 2 +- .../mortlach_multi4_cst_cstnt_si_ctg.rs | 2 +- .../mortlach_multi4_cst_cstnt_ss_ctg.rs | 2 +- .../src/A64/sme/mortlach_multi_mem_nctg.rs | 2 +- .../mortlach_multi2_cld_cldnt_si_nctg.rs | 2 +- .../mortlach_multi2_cld_cldnt_ss_nctg.rs | 2 +- .../mortlach_multi2_cst_cstnt_si_nctg.rs | 2 +- .../mortlach_multi2_cst_cstnt_ss_nctg.rs | 2 +- .../mortlach_multi4_cld_cldnt_si_nctg.rs | 2 +- .../mortlach_multi4_cld_cldnt_ss_nctg.rs | 2 +- .../mortlach_multi4_cst_cstnt_si_nctg.rs | 2 +- .../mortlach_multi4_cst_cstnt_ss_nctg.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_1.rs | 2 +- .../mortlach_multi2_select_int.rs | 2 +- .../mortlach_multi4_select_int.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_2a.rs | 2 +- .../mortlach_multi2_z_z_add_sm.rs | 2 +- .../mortlach_multi2_z_z_fminmax_sm.rs | 2 +- .../mortlach_multi2_z_z_fscale_sm.rs | 2 +- .../mortlach_multi2_z_z_minmax_sm.rs | 2 +- .../mortlach_multi2_z_z_shift_sm.rs | 2 +- .../mortlach_multi2_z_z_sqdmulh_sm.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_2b.rs | 2 +- .../mortlach_multi4_z_z_add_sm.rs | 2 +- .../mortlach_multi4_z_z_fminmax_sm.rs | 2 +- .../mortlach_multi4_z_z_fscale_sm.rs | 2 +- .../mortlach_multi4_z_z_minmax_sm.rs | 2 +- .../mortlach_multi4_z_z_shift_sm.rs | 2 +- .../mortlach_multi4_z_z_sqdmulh_sm.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_2c0.rs | 2 +- .../mortlach_multi2_z_z_fminmax_mm.rs | 2 +- .../mortlach_multi2_z_z_fscale_mm.rs | 2 +- .../mortlach_multi2_z_z_minmax_mm.rs | 2 +- .../mortlach_multi2_z_z_shift_mm.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_2c1.rs | 2 +- .../mortlach_multi2_z_z_sqdmulh_mm.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_2d0.rs | 2 +- .../mortlach_multi4_z_z_fminmax_mm.rs | 2 +- .../mortlach_multi4_z_z_fscale_mm.rs | 2 +- .../mortlach_multi4_z_z_minmax_mm.rs | 2 +- .../mortlach_multi4_z_z_shift_mm.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_2d1.rs | 2 +- .../mortlach_multi4_z_z_sqdmulh_mm.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_3.rs | 2 +- .../mortlach_multi2_clamp_int.rs | 2 +- .../mortlach_multi2_fclamp.rs | 2 +- .../mortlach_multi2_qrshr.rs | 2 +- .../mortlach_multi2_z_z_long_zip.rs | 2 +- .../mortlach_multi2_z_z_zip.rs | 2 +- .../mortlach_multi4_clamp_int.rs | 2 +- .../mortlach_multi4_fclamp.rs | 2 +- .../mortlach_multi4_qrshr.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_4.rs | 2 +- .../mortlach_multi2_fpint_cvrt.rs | 2 +- .../mortlach_multi2_frint.rs | 2 +- .../mortlach_multi2_intfp_cvrt.rs | 2 +- .../mortlach_multi2_narrow_fp8_cvrt.rs | 2 +- .../mortlach_multi2_narrow_fp_cvrt.rs | 2 +- .../mortlach_multi2_narrow_int_cvrt.rs | 2 +- .../mortlach_multi2_wide_fp8_cvrt.rs | 2 +- .../mortlach_multi2_wide_fp_cvrt.rs | 2 +- .../mortlach_multi2_wide_int.rs | 2 +- .../mortlach_multi4_fpint_cvrt.rs | 2 +- .../mortlach_multi4_frint.rs | 2 +- .../mortlach_multi4_intfp_cvrt.rs | 2 +- .../mortlach_multi4_narrow_fp8_cvrt.rs | 2 +- .../mortlach_multi4_narrow_int_cvrt.rs | 2 +- .../mortlach_multi4_wide_int.rs | 2 +- .../mortlach_multi4_z_z_long_zip.rs | 2 +- .../mortlach_multi4_z_z_zip.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_5a.rs | 2 +- .../mortlach_multi2_fmul_mm.rs | 2 +- .../mortlach_multi4_fmul_mm.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_5b.rs | 2 +- .../mortlach_multi2_fmul_sm.rs | 2 +- .../mortlach_multi4_fmul_sm.rs | 2 +- .../src/A64/sme/mortlach_multi_sve_6.rs | 2 +- .../mortlach_multi4_lut6_16_ctg.rs | 2 +- .../mortlach_multi4_lut6_16_nctg.rs | 2 +- .../src/A64/sme/mortlach_multizero.rs | 2 +- .../mortlach_multizero/mortlach_multi_zero.rs | 2 +- .../src/A64/sme/mortlach_zero.rs | 2 +- .../A64/sme/mortlach_zero/mortlach_zero.rs | 2 +- .../src/A64/sme/mortlach_zero_zt.rs | 2 +- .../src/A64/sme/mortlach_zt_expand_ctg.rs | 2 +- .../mortlach_expand_1dst.rs | 2 +- .../mortlach_expand_2dst_ctg.rs | 2 +- .../mortlach_expand_4dst2src_ctg.rs | 2 +- .../mortlach_expand_4dst3src_ctg.rs | 2 +- .../mortlach_expand_4dst_ctg.rs | 2 +- .../src/A64/sme/mortlach_zt_expand_nctg.rs | 2 +- .../mortlach_expand_2dst_nctg.rs | 2 +- .../mortlach_expand_4dst2src_nctg.rs | 2 +- .../mortlach_expand_4dst3src_nctg.rs | 2 +- .../mortlach_expand_4dst_nctg.rs | 2 +- aarchmrs-instructions/src/A64/sve.rs | 2 +- aarchmrs-instructions/src/A64/sve/sve_abal.rs | 2 +- .../src/A64/sve/sve_abal/sve_abal.rs | 2 +- .../src/A64/sve/sve_alloca.rs | 2 +- .../A64/sve/sve_alloca/sve_int_arith_svl.rs | 2 +- .../A64/sve/sve_alloca/sve_int_arith_vl.rs | 2 +- .../A64/sve/sve_alloca/sve_int_read_svl_a.rs | 2 +- .../A64/sve/sve_alloca/sve_int_read_vl_a.rs | 2 +- .../src/A64/sve/sve_cmpgpr.rs | 2 +- .../src/A64/sve/sve_cmpgpr/sve_int_cterm.rs | 2 +- .../A64/sve/sve_cmpgpr/sve_int_while_rr.rs | 2 +- .../src/A64/sve/sve_cmpgpr/sve_int_whilenc.rs | 2 +- .../src/A64/sve/sve_cmpsimm.rs | 2 +- .../A64/sve/sve_cmpsimm/sve_int_scmp_vi.rs | 2 +- .../src/A64/sve/sve_cmpuimm.rs | 2 +- .../A64/sve/sve_cmpuimm/sve_int_ucmp_vi.rs | 2 +- .../src/A64/sve/sve_cmpvec.rs | 2 +- .../src/A64/sve/sve_cmpvec/sve_int_cmp_0.rs | 2 +- .../src/A64/sve/sve_cmpvec/sve_int_cmp_1.rs | 2 +- .../src/A64/sve/sve_countelt.rs | 2 +- .../src/A64/sve/sve_countelt/sve_int_count.rs | 2 +- .../A64/sve/sve_countelt/sve_int_countvlv0.rs | 2 +- .../A64/sve/sve_countelt/sve_int_countvlv1.rs | 2 +- .../sve_countelt/sve_int_pred_pattern_a.rs | 2 +- .../sve_countelt/sve_int_pred_pattern_b.rs | 2 +- .../src/A64/sve/sve_fp8_fma_w.rs | 2 +- .../A64/sve/sve_fp8_fma_w/sve_fp8_fma_long.rs | 2 +- .../sve_fp8_fma_w/sve_fp8_fma_long_long.rs | 2 +- .../A64/sve/sve_fp8_fma_w_by_indexed_elem.rs | 2 +- .../sve_fp8_fma_long_by_indexed_elem.rs | 2 +- .../A64/sve/sve_fp8_fma_ww_by_indexed_elem.rs | 2 +- .../sve_fp8_fma_long_long_by_indexed_elem.rs | 2 +- .../src/A64/sve/sve_fp8_fmmla.rs | 2 +- .../A64/sve/sve_fp8_fmmla/sve_fp8_fmmla.rs | 2 +- .../src/A64/sve/sve_fp_clamp.rs | 2 +- .../src/A64/sve/sve_fp_clamp/sve_fp_clamp.rs | 2 +- .../src/A64/sve/sve_fp_cmpvev.rs | 2 +- .../A64/sve/sve_fp_cmpvev/sve_fp_3op_p_pd.rs | 2 +- .../src/A64/sve/sve_fp_cmpzero.rs | 2 +- .../A64/sve/sve_fp_cmpzero/sve_fp_2op_p_pd.rs | 2 +- .../src/A64/sve/sve_fp_fastreduce.rs | 2 +- .../sve/sve_fp_fastreduce/sve_fp_fast_red.rs | 2 +- .../src/A64/sve/sve_fp_fastreduceq.rs | 2 +- .../sve_fp_fastreduceq/sve_fp_fast_redq.rs | 2 +- .../src/A64/sve/sve_fp_fcadd.rs | 2 +- .../src/A64/sve/sve_fp_fcadd/sve_fp_fcadd.rs | 2 +- .../src/A64/sve/sve_fp_fcmla.rs | 2 +- .../src/A64/sve/sve_fp_fcmla/sve_fp_fcmla.rs | 2 +- .../A64/sve/sve_fp_fcmla_by_indexed_elem.rs | 2 +- .../sve_fp_fcmla_by_indexed_elem.rs | 2 +- .../src/A64/sve/sve_fp_fcvt2.rs | 2 +- .../src/A64/sve/sve_fp_fcvt2/sve_fp_fcvt2.rs | 2 +- .../src/A64/sve/sve_fp_fcvt2z.rs | 2 +- .../A64/sve/sve_fp_fcvt2z/sve_fp_fcvt2z.rs | 2 +- .../src/A64/sve/sve_fp_fma.rs | 2 +- .../A64/sve/sve_fp_fma/sve_fp_3op_p_zds_a.rs | 2 +- .../A64/sve/sve_fp_fma/sve_fp_3op_p_zds_b.rs | 2 +- .../src/A64/sve/sve_fp_fma_by_indexed_elem.rs | 2 +- .../sve_fp_fma_by_indexed_elem.rs | 2 +- .../src/A64/sve/sve_fp_fma_w.rs | 2 +- .../src/A64/sve/sve_fp_fma_w/sve_fp_fdot.rs | 2 +- .../A64/sve/sve_fp_fma_w/sve_fp_fma_long.rs | 2 +- .../A64/sve/sve_fp_fma_w_by_indexed_elem.rs | 2 +- .../sve_fp_fdot_by_indexed_elem.rs | 2 +- .../sve_fp_fma_long_by_indexed_elem.rs | 2 +- .../src/A64/sve/sve_fp_fmmla.rs | 2 +- .../src/A64/sve/sve_fp_fmmla/sve_fp_fmmla.rs | 2 +- .../src/A64/sve/sve_fp_fmmla_nw.rs | 2 +- .../sve/sve_fp_fmmla_nw/sve_fp_fmmla_nw.rs | 2 +- .../A64/sve/sve_fp_fmul_by_indexed_elem.rs | 2 +- .../sve_fp_fmul_by_indexed_elem.rs | 2 +- .../src/A64/sve/sve_fp_pairwise.rs | 2 +- .../sve/sve_fp_pairwise/sve_fp_pairwise.rs | 2 +- .../src/A64/sve/sve_fp_pred.rs | 2 +- .../A64/sve/sve_fp_pred/sve_fp_2op_i_p_zds.rs | 2 +- .../A64/sve/sve_fp_pred/sve_fp_2op_p_zds.rs | 2 +- .../src/A64/sve/sve_fp_pred/sve_fp_ftmad.rs | 2 +- .../src/A64/sve/sve_fp_slowreduce.rs | 2 +- .../sve/sve_fp_slowreduce/sve_fp_2op_p_vd.rs | 2 +- .../src/A64/sve/sve_fp_unary.rs | 2 +- .../A64/sve/sve_fp_unary/sve_fp_2op_p_zd_a.rs | 2 +- .../sve/sve_fp_unary/sve_fp_2op_p_zd_b_0.rs | 2 +- .../sve/sve_fp_unary/sve_fp_2op_p_zd_b_1.rs | 2 +- .../A64/sve/sve_fp_unary/sve_fp_2op_p_zd_c.rs | 2 +- .../A64/sve/sve_fp_unary/sve_fp_2op_p_zd_d.rs | 2 +- .../src/A64/sve/sve_fp_unary_unpred.rs | 2 +- .../sve_fp8_fcvt_narrow.rs | 2 +- .../sve_fp_unary_unpred/sve_fp8_fcvt_wide.rs | 2 +- .../sve_fp_unary_unpred/sve_fp_2op_u_zd.rs | 2 +- .../sve_fp_fcvtzu_narrow.rs | 2 +- .../sve_fp_unary_unpred/sve_fp_ucvtf_wide.rs | 2 +- .../src/A64/sve/sve_fp_unpred.rs | 2 +- .../A64/sve/sve_fp_unpred/sve_fp_3op_u_zd.rs | 2 +- .../src/A64/sve/sve_fp_zeroing_unary.rs | 2 +- .../sve_fp_z2op_p_zd_a.rs | 2 +- .../sve_fp_z2op_p_zd_b_0.rs | 2 +- .../sve_fp_z2op_p_zd_b_1.rs | 2 +- .../sve_fp_z2op_p_zd_c.rs | 2 +- .../sve_fp_z2op_p_zd_d.rs | 2 +- .../src/A64/sve/sve_index.rs | 2 +- .../src/A64/sve/sve_index/sve_int_index_ii.rs | 2 +- .../src/A64/sve/sve_index/sve_int_index_ir.rs | 2 +- .../src/A64/sve/sve_index/sve_int_index_ri.rs | 2 +- .../src/A64/sve/sve_index/sve_int_index_rr.rs | 2 +- .../src/A64/sve/sve_int_adr.rs | 2 +- .../sve_int_adr/sve_int_bin_cons_misc_0_a.rs | 2 +- .../src/A64/sve/sve_int_muladd_pred.rs | 2 +- .../sve_int_mladdsub_vvv_pred.rs | 2 +- .../sve_int_mlas_vvv_pred.rs | 2 +- .../src/A64/sve/sve_int_pred_bin.rs | 2 +- .../sve_int_bin_pred_arit_0.rs | 2 +- .../sve_int_bin_pred_arit_1.rs | 2 +- .../sve_int_bin_pred_arit_2.rs | 2 +- .../sve_int_pred_bin/sve_int_bin_pred_div.rs | 2 +- .../sve_int_pred_bin/sve_int_bin_pred_log.rs | 2 +- .../src/A64/sve/sve_int_pred_red.rs | 2 +- .../sve_int_pred_red/sve_int_movprfx_pred.rs | 2 +- .../sve/sve_int_pred_red/sve_int_reduce_0.rs | 2 +- .../sve/sve_int_pred_red/sve_int_reduce_0q.rs | 2 +- .../sve/sve_int_pred_red/sve_int_reduce_1.rs | 2 +- .../sve/sve_int_pred_red/sve_int_reduce_1q.rs | 2 +- .../sve/sve_int_pred_red/sve_int_reduce_2.rs | 2 +- .../sve/sve_int_pred_red/sve_int_reduce_2q.rs | 2 +- .../src/A64/sve/sve_int_pred_shift.rs | 2 +- .../sve_int_bin_pred_shift_0.rs | 2 +- .../sve_int_bin_pred_shift_1.rs | 2 +- .../sve_int_bin_pred_shift_2.rs | 2 +- .../src/A64/sve/sve_int_pred_un.rs | 2 +- .../sve_int_pred_un/sve_int_un_pred_arit_0.rs | 2 +- .../sve_int_pred_un/sve_int_un_pred_arit_1.rs | 2 +- .../src/A64/sve/sve_int_select.rs | 2 +- .../A64/sve/sve_int_select/sve_int_sel_vvv.rs | 2 +- .../src/A64/sve/sve_int_unpred_arit.rs | 2 +- .../sve_int_bin_cons_arit_0.rs | 2 +- .../src/A64/sve/sve_int_unpred_arit_b.rs | 2 +- .../sve_int_unpred_arit_b/sve_int_addqp.rs | 2 +- .../sve_int_unpred_arit_b/sve_int_addsubp.rs | 2 +- .../sve_int_unpred_arit_b/sve_int_mul_b.rs | 2 +- .../sve_int_unpred_arit_b/sve_int_sqdmulh.rs | 2 +- .../src/A64/sve/sve_int_unpred_logical.rs | 2 +- .../sve_int_bin_cons_log.rs | 2 +- .../sve_int_rotate_imm.rs | 2 +- .../sve_int_tern_log.rs | 2 +- .../src/A64/sve/sve_int_unpred_misc.rs | 2 +- .../sve_int_bin_cons_misc_0_b.rs | 2 +- .../sve_int_bin_cons_misc_0_c.rs | 2 +- .../sve_int_bin_cons_misc_0_d.rs | 2 +- .../src/A64/sve/sve_int_unpred_shift.rs | 2 +- .../sve_int_bin_cons_shift_a.rs | 2 +- .../sve_int_bin_cons_shift_b.rs | 2 +- .../src/A64/sve/sve_intx_acc.rs | 2 +- .../src/A64/sve/sve_intx_acc/sve_intx_aba.rs | 2 +- .../A64/sve/sve_intx_acc/sve_intx_aba_long.rs | 2 +- .../A64/sve/sve_intx_acc/sve_intx_adc_long.rs | 2 +- .../src/A64/sve/sve_intx_acc/sve_intx_cadd.rs | 2 +- .../sve/sve_intx_acc/sve_intx_shift_insert.rs | 2 +- .../src/A64/sve/sve_intx_acc/sve_intx_sra.rs | 2 +- .../src/A64/sve/sve_intx_by_indexed_elem.rs | 2 +- .../sve_intx_cdot_by_indexed_elem.rs | 2 +- .../sve_intx_cmla_by_indexed_elem.rs | 2 +- .../sve_intx_dot_by_indexed_elem.rs | 2 +- .../sve_intx_mixed_dot_by_indexed_elem.rs | 2 +- .../sve_intx_mla_by_indexed_elem.rs | 2 +- .../sve_intx_mla_long_by_indexed_elem.rs | 2 +- .../sve_intx_mul_by_indexed_elem.rs | 2 +- .../sve_intx_mul_long_by_indexed_elem.rs | 2 +- .../sve_intx_qdmla_long_by_indexed_elem.rs | 2 +- .../sve_intx_qdmul_long_by_indexed_elem.rs | 2 +- .../sve_intx_qdmulh_by_indexed_elem.rs | 2 +- .../sve_intx_qrdcmla_by_indexed_elem.rs | 2 +- .../sve_intx_qrdmlah_by_indexed_elem.rs | 2 +- .../src/A64/sve/sve_intx_clamp.rs | 2 +- .../A64/sve/sve_intx_clamp/sve_intx_clamp.rs | 2 +- .../src/A64/sve/sve_intx_cons_widening.rs | 2 +- .../sve_intx_cons_arith_long.rs | 2 +- .../sve_intx_cons_arith_wide.rs | 2 +- .../sve_intx_cons_mul_long.rs | 2 +- .../src/A64/sve/sve_intx_constructive.rs | 2 +- .../sve_intx_constructive/sve_intx_clong.rs | 2 +- .../sve_intx_constructive/sve_intx_eorx.rs | 2 +- .../sve_intx_constructive/sve_intx_mmla.rs | 2 +- .../sve_intx_perm_bit.rs | 2 +- .../sve_intx_shift_long.rs | 2 +- .../src/A64/sve/sve_intx_crypto.rs | 2 +- .../sve_crypto_binary_const.rs | 2 +- .../sve_intx_crypto/sve_crypto_binary_dest.rs | 2 +- .../sve_crypto_binary_multi2.rs | 2 +- .../sve_crypto_binary_multi4.rs | 2 +- .../sve_intx_crypto/sve_crypto_pmlal_multi.rs | 2 +- .../sve_intx_crypto/sve_crypto_pmull_multi.rs | 2 +- .../sve/sve_intx_crypto/sve_crypto_unary.rs | 2 +- .../src/A64/sve/sve_intx_dot2.rs | 2 +- .../A64/sve/sve_intx_dot2/sve_intx_dot2.rs | 2 +- .../A64/sve/sve_intx_dot2_by_indexed_elem.rs | 2 +- .../sve_intx_dot2_by_indexed_elem.rs | 2 +- .../src/A64/sve/sve_intx_histcnt.rs | 2 +- .../sve/sve_intx_histcnt/sve_intx_histcnt.rs | 2 +- .../src/A64/sve/sve_intx_histseg_lut.rs | 2 +- .../sve_intx_histseg_lut/sve_intx_histseg.rs | 2 +- .../sve_intx_histseg_lut/sve_intx_lut2_16.rs | 2 +- .../sve_intx_histseg_lut/sve_intx_lut2_8.rs | 2 +- .../sve_intx_histseg_lut/sve_intx_lut4_16.rs | 2 +- .../sve_intx_histseg_lut/sve_intx_lut4_8.rs | 2 +- .../sve_intx_histseg_lut/sve_intx_lut6_16.rs | 2 +- .../sve_intx_histseg_lut/sve_intx_lut6_8.rs | 2 +- .../src/A64/sve/sve_intx_muladd_unpred.rs | 2 +- .../sve_intx_muladd_unpred/sve_intx_cdot.rs | 2 +- .../sve_intx_muladd_unpred/sve_intx_cmla.rs | 2 +- .../sve_intx_muladd_unpred/sve_intx_dot.rs | 2 +- .../sve_intx_mixed_dot.rs | 2 +- .../sve_intx_mlal_long.rs | 2 +- .../sve_intx_qdmlal_long.rs | 2 +- .../sve_intx_qdmlalbt.rs | 2 +- .../sve_intx_qrdmlah.rs | 2 +- .../src/A64/sve/sve_intx_narrowing.rs | 2 +- .../sve_intx_arith_narrow.rs | 2 +- .../sve_intx_extract_narrow.rs | 2 +- .../sve_intx_multi_extract_narrow.rs | 2 +- .../sve_intx_multi_shift_narrow.rs | 2 +- .../sve_intx_shift_narrow.rs | 2 +- .../src/A64/sve/sve_intx_predicated.rs | 2 +- .../sve_intx_accumulate_long_pairs.rs | 2 +- .../sve_intx_arith_binary_pairs.rs | 2 +- .../sve_intx_bin_pred_shift_sat_round.rs | 2 +- .../sve_intx_pred_arith_binary.rs | 2 +- .../sve_intx_pred_arith_binary_sat.rs | 2 +- .../sve_intx_pred_arith_unary.rs | 2 +- .../src/A64/sve/sve_intx_string.rs | 2 +- .../A64/sve/sve_intx_string/sve_intx_match.rs | 26 +++---- .../src/A64/sve/sve_maskimm.rs | 2 +- .../sve/sve_maskimm/sve_int_dup_mask_imm.rs | 2 +- .../A64/sve/sve_maskimm/sve_int_log_imm.rs | 2 +- .../src/A64/sve/sve_mem32.rs | 2 +- .../src/A64/sve/sve_mem32/sve_mem_32b_fill.rs | 2 +- .../A64/sve/sve_mem32/sve_mem_32b_gld_sv_a.rs | 2 +- .../A64/sve/sve_mem32/sve_mem_32b_gld_sv_b.rs | 2 +- .../A64/sve/sve_mem32/sve_mem_32b_gld_vi.rs | 2 +- .../A64/sve/sve_mem32/sve_mem_32b_gld_vs.rs | 2 +- .../A64/sve/sve_mem32/sve_mem_32b_gldnt_vs.rs | 2 +- .../A64/sve/sve_mem32/sve_mem_32b_pfill.rs | 2 +- .../A64/sve/sve_mem32/sve_mem_32b_prfm_sv.rs | 2 +- .../A64/sve/sve_mem32/sve_mem_32b_prfm_vi.rs | 2 +- .../src/A64/sve/sve_mem32/sve_mem_ld_dup.rs | 2 +- .../src/A64/sve/sve_mem32/sve_mem_prfm_si.rs | 2 +- .../src/A64/sve/sve_mem32/sve_mem_prfm_ss.rs | 2 +- .../src/A64/sve/sve_mem64.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_gld_sv.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_gld_sv2.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_gld_vi.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_gld_vs.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_gld_vs2.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_gldnt_vs.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_gldq_vs.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_prfm_sv.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_prfm_sv2.rs | 2 +- .../A64/sve/sve_mem64/sve_mem_64b_prfm_vi.rs | 2 +- .../src/A64/sve/sve_memcld.rs | 2 +- .../src/A64/sve/sve_memcld/sve_mem_cld_si.rs | 2 +- .../A64/sve/sve_memcld/sve_mem_cld_si_q.rs | 2 +- .../src/A64/sve/sve_memcld/sve_mem_cld_ss.rs | 2 +- .../A64/sve/sve_memcld/sve_mem_cld_ss_q.rs | 2 +- .../A64/sve/sve_memcld/sve_mem_cldff_ss.rs | 2 +- .../A64/sve/sve_memcld/sve_mem_cldnf_si.rs | 2 +- .../A64/sve/sve_memcld/sve_mem_cldnt_si.rs | 2 +- .../A64/sve/sve_memcld/sve_mem_cldnt_ss.rs | 2 +- .../src/A64/sve/sve_memcld/sve_mem_eld_si.rs | 2 +- .../src/A64/sve/sve_memcld/sve_mem_eld_ss.rs | 2 +- .../src/A64/sve/sve_memcld/sve_mem_eldq_si.rs | 2 +- .../src/A64/sve/sve_memcld/sve_mem_eldq_ss.rs | 2 +- .../src/A64/sve/sve_memcld/sve_mem_ldqr_si.rs | 2 +- .../src/A64/sve/sve_memcld/sve_mem_ldqr_ss.rs | 2 +- .../src/A64/sve/sve_memcst_nt.rs | 2 +- .../A64/sve/sve_memcst_nt/sve_mem_cstnt_ss.rs | 2 +- .../A64/sve/sve_memcst_nt/sve_mem_est_ss.rs | 2 +- .../src/A64/sve/sve_memsst_nt.rs | 2 +- .../sve/sve_memsst_nt/sve_mem_sstnt_32b_vs.rs | 2 +- .../sve/sve_memsst_nt/sve_mem_sstnt_64b_vs.rs | 2 +- .../sve/sve_memsst_nt/sve_mem_sstq_64b_vs.rs | 2 +- .../src/A64/sve/sve_memst_cs.rs | 2 +- .../A64/sve/sve_memst_cs/sve_mem_cst_ss.rs | 2 +- .../A64/sve/sve_memst_cs/sve_mem_estq_si.rs | 2 +- .../A64/sve/sve_memst_cs/sve_mem_estq_ss.rs | 2 +- .../A64/sve/sve_memst_cs/sve_mem_pspill.rs | 2 +- .../src/A64/sve/sve_memst_cs/sve_mem_spill.rs | 2 +- .../src/A64/sve/sve_memst_si.rs | 2 +- .../A64/sve/sve_memst_si/sve_mem_cst_si.rs | 2 +- .../A64/sve/sve_memst_si/sve_mem_cstnt_si.rs | 2 +- .../A64/sve/sve_memst_si/sve_mem_est_si.rs | 2 +- .../src/A64/sve/sve_memst_ss.rs | 2 +- .../A64/sve/sve_memst_ss/sve_mem_sst_sv_a.rs | 2 +- .../A64/sve/sve_memst_ss/sve_mem_sst_sv_b.rs | 2 +- .../A64/sve/sve_memst_ss/sve_mem_sst_vs_a.rs | 2 +- .../A64/sve/sve_memst_ss/sve_mem_sst_vs_b.rs | 2 +- .../src/A64/sve/sve_memst_ss2.rs | 2 +- .../A64/sve/sve_memst_ss2/sve_mem_sst_sv2.rs | 2 +- .../A64/sve/sve_memst_ss2/sve_mem_sst_vi_a.rs | 2 +- .../A64/sve/sve_memst_ss2/sve_mem_sst_vi_b.rs | 2 +- .../A64/sve/sve_memst_ss2/sve_mem_sst_vs2.rs | 2 +- .../src/A64/sve/sve_perm_extract.rs | 2 +- .../sve_int_perm_extract_i.rs | 2 +- .../sve_intx_perm_extract_i.rs | 2 +- .../src/A64/sve/sve_perm_inter.rs | 2 +- .../sve_int_perm_bin_perm_zz.rs | 2 +- .../src/A64/sve/sve_perm_inter_long.rs | 2 +- .../sve_int_perm_bin_long_perm_zz.rs | 2 +- .../src/A64/sve/sve_perm_pred.rs | 2 +- .../sve_perm_pred/sve_int_perm_clast_rz.rs | 2 +- .../sve_perm_pred/sve_int_perm_clast_vz.rs | 2 +- .../sve_perm_pred/sve_int_perm_clast_zz.rs | 2 +- .../sve/sve_perm_pred/sve_int_perm_compact.rs | 2 +- .../sve/sve_perm_pred/sve_int_perm_cpy_r.rs | 2 +- .../sve/sve_perm_pred/sve_int_perm_cpy_v.rs | 2 +- .../sve/sve_perm_pred/sve_int_perm_expand.rs | 2 +- .../sve/sve_perm_pred/sve_int_perm_last_r.rs | 2 +- .../sve/sve_perm_pred/sve_int_perm_last_v.rs | 2 +- .../A64/sve/sve_perm_pred/sve_int_perm_rev.rs | 2 +- .../sve/sve_perm_pred/sve_int_perm_revd.rs | 2 +- .../sve/sve_perm_pred/sve_int_perm_splice.rs | 2 +- .../sve/sve_perm_pred/sve_intx_perm_splice.rs | 2 +- .../src/A64/sve/sve_perm_predicates.rs | 2 +- .../sve_int_perm_bin_perm_pp.rs | 2 +- .../sve_perm_predicates/sve_int_perm_punpk.rs | 2 +- .../sve_int_perm_reverse_p.rs | 2 +- .../src/A64/sve/sve_perm_quads_a.rs | 2 +- .../sve_perm_quads_a/sve_int_perm_dupq_i.rs | 2 +- .../sve/sve_perm_quads_a/sve_int_perm_extq.rs | 2 +- .../src/A64/sve/sve_perm_quads_b.rs | 2 +- .../sve_perm_quads_b/sve_int_perm_binquads.rs | 2 +- .../src/A64/sve/sve_perm_quads_c.rs | 2 +- .../sve_perm_quads_c/sve_int_perm_tbxquads.rs | 2 +- .../src/A64/sve/sve_perm_unpred_a.rs | 2 +- .../sve_perm_unpred_a/sve_int_perm_dup_i.rs | 2 +- .../src/A64/sve/sve_perm_unpred_b.rs | 2 +- .../sve_int_perm_tbl_3src.rs | 2 +- .../src/A64/sve/sve_perm_unpred_c.rs | 2 +- .../sve/sve_perm_unpred_c/sve_int_perm_tbl.rs | 2 +- .../src/A64/sve/sve_perm_unpred_d.rs | 2 +- .../sve/sve_perm_unpred_d/sve_int_mov_p2v.rs | 2 +- .../sve/sve_perm_unpred_d/sve_int_mov_v2p.rs | 2 +- .../sve_perm_unpred_d/sve_int_perm_dup_r.rs | 2 +- .../sve_perm_unpred_d/sve_int_perm_insrs.rs | 2 +- .../sve_perm_unpred_d/sve_int_perm_insrv.rs | 2 +- .../sve_int_perm_reverse_z.rs | 2 +- .../sve_perm_unpred_d/sve_int_perm_unpk.rs | 2 +- .../src/A64/sve/sve_pred_count_a.rs | 2 +- .../sve/sve_pred_count_a/sve_int_pcount_pn.rs | 2 +- .../sve_pred_count_a/sve_int_pcount_pred.rs | 2 +- .../src/A64/sve/sve_pred_count_b.rs | 2 +- .../sve/sve_pred_count_b/sve_int_count_r.rs | 2 +- .../sve_pred_count_b/sve_int_count_r_sat.rs | 2 +- .../sve/sve_pred_count_b/sve_int_count_v.rs | 2 +- .../sve_pred_count_b/sve_int_count_v_sat.rs | 2 +- .../src/A64/sve/sve_pred_dup.rs | 2 +- .../A64/sve/sve_pred_dup/sve_int_pred_dup.rs | 2 +- .../src/A64/sve/sve_pred_gen_a.rs | 2 +- .../sve/sve_pred_gen_a/sve_int_pred_log.rs | 2 +- .../src/A64/sve/sve_pred_gen_b.rs | 2 +- .../A64/sve/sve_pred_gen_b/sve_int_brkp.rs | 2 +- .../src/A64/sve/sve_pred_gen_c.rs | 2 +- .../A64/sve/sve_pred_gen_c/sve_int_break.rs | 2 +- .../A64/sve/sve_pred_gen_c/sve_int_brkn.rs | 2 +- .../src/A64/sve/sve_pred_gen_d.rs | 2 +- .../A64/sve/sve_pred_gen_d/sve_int_pfalse.rs | 2 +- .../A64/sve/sve_pred_gen_d/sve_int_pfirst.rs | 2 +- .../A64/sve/sve_pred_gen_d/sve_int_pnext.rs | 2 +- .../A64/sve/sve_pred_gen_d/sve_int_ptest.rs | 2 +- .../A64/sve/sve_pred_gen_d/sve_int_ptrue.rs | 2 +- .../A64/sve/sve_pred_gen_d/sve_int_rdffr.rs | 2 +- .../A64/sve/sve_pred_gen_d/sve_int_rdffr_2.rs | 2 +- .../src/A64/sve/sve_pred_wrffr.rs | 2 +- .../A64/sve/sve_pred_wrffr/sve_int_setffr.rs | 2 +- .../A64/sve/sve_pred_wrffr/sve_int_wrffr.rs | 2 +- .../src/A64/sve/sve_ptr_muladd_unpred.rs | 2 +- .../sve_ptr_muladd_unpred.rs | 2 +- .../src/A64/sve/sve_while_pn.rs | 2 +- .../sve/sve_while_pn/sve_int_ctr_to_mask.rs | 2 +- .../A64/sve/sve_while_pn/sve_int_pn_ptrue.rs | 2 +- .../sve/sve_while_pn/sve_int_while_rr_pair.rs | 2 +- .../sve/sve_while_pn/sve_int_while_rr_pn.rs | 2 +- .../src/A64/sve/sve_wideimm_pred.rs | 2 +- .../sve_int_dup_fpimm_pred.rs | 2 +- .../sve_wideimm_pred/sve_int_dup_imm_pred.rs | 2 +- .../src/A64/sve/sve_wideimm_unpred.rs | 2 +- .../sve_wideimm_unpred/sve_int_arith_imm0.rs | 2 +- .../sve_wideimm_unpred/sve_int_arith_imm1.rs | 2 +- .../sve_wideimm_unpred/sve_int_arith_imm2.rs | 2 +- .../sve_wideimm_unpred/sve_int_dup_fpimm.rs | 2 +- .../sve/sve_wideimm_unpred/sve_int_dup_imm.rs | 2 +- aarchmrs-instructions/src/T32.rs | 2 +- aarchmrs-instructions/src/T32/b16.rs | 2 +- aarchmrs-instructions/src/T32/n.rs | 2 +- aarchmrs-instructions/src/T32/n/addpcsp16.rs | 2 +- aarchmrs-instructions/src/T32/n/brc.rs | 2 +- .../src/T32/n/brc/bcond16.rs | 2 +- .../src/T32/n/brc/except16.rs | 2 +- aarchmrs-instructions/src/T32/n/dpint16_2l.rs | 2 +- aarchmrs-instructions/src/T32/n/ldlit16.rs | 2 +- aarchmrs-instructions/src/T32/n/ldst16_imm.rs | 2 +- aarchmrs-instructions/src/T32/n/ldst16_reg.rs | 2 +- aarchmrs-instructions/src/T32/n/ldst16_sp.rs | 2 +- .../src/T32/n/ldsth16_imm.rs | 2 +- aarchmrs-instructions/src/T32/n/ldstm16.rs | 2 +- aarchmrs-instructions/src/T32/n/misc16.rs | 2 +- .../src/T32/n/misc16/adjsp16.rs | 2 +- .../src/T32/n/misc16/bkpt16.rs | 2 +- .../src/T32/n/misc16/cbznz16.rs | 2 +- .../src/T32/n/misc16/cps16.rs | 2 +- .../src/T32/n/misc16/ext16.rs | 2 +- .../src/T32/n/misc16/hints16.rs | 2 +- .../src/T32/n/misc16/hlt16.rs | 2 +- .../src/T32/n/misc16/it16.rs | 2 +- .../src/T32/n/misc16/pushpop16.rs | 2 +- .../src/T32/n/misc16/rev16.rs | 2 +- .../src/T32/n/misc16/setpan16.rs | 2 +- aarchmrs-instructions/src/T32/n/sftdpi.rs | 2 +- .../src/T32/n/sftdpi/addsub16_1l_imm.rs | 2 +- .../src/T32/n/sftdpi/addsub16_2l_imm.rs | 2 +- .../src/T32/n/sftdpi/addsub16_3l.rs | 2 +- .../src/T32/n/sftdpi/shift16_imm.rs | 2 +- aarchmrs-instructions/src/T32/n/spcd.rs | 2 +- .../src/T32/n/spcd/addsub16_2h.rs | 2 +- aarchmrs-instructions/src/T32/n/spcd/bx16.rs | 2 +- aarchmrs-instructions/src/T32/w.rs | 2 +- aarchmrs-instructions/src/T32/w/bcrtrl.rs | 2 +- aarchmrs-instructions/src/T32/w/bcrtrl/b.rs | 2 +- .../src/T32/w/bcrtrl/bcond.rs | 2 +- aarchmrs-instructions/src/T32/w/bcrtrl/bl.rs | 2 +- aarchmrs-instructions/src/T32/w/bcrtrl/blx.rs | 2 +- .../src/T32/w/bcrtrl/bx_jaz.rs | 2 +- aarchmrs-instructions/src/T32/w/bcrtrl/cps.rs | 2 +- .../src/T32/w/bcrtrl/dcps.rs | 2 +- .../src/T32/w/bcrtrl/eret.rs | 2 +- .../src/T32/w/bcrtrl/except.rs | 2 +- .../src/T32/w/bcrtrl/hints.rs | 2 +- .../src/T32/w/bcrtrl/mrs_bank.rs | 2 +- .../src/T32/w/bcrtrl/mrs_spec.rs | 2 +- .../src/T32/w/bcrtrl/msr_bank.rs | 2 +- .../src/T32/w/bcrtrl/msr_spec.rs | 2 +- .../src/T32/w/bcrtrl/system.rs | 2 +- aarchmrs-instructions/src/T32/w/cpaf.rs | 2 +- .../src/T32/w/cpaf/advsimdext.rs | 2 +- .../src/T32/w/cpaf/advsimdext/fp_csel.rs | 2 +- .../src/T32/w/cpaf/advsimdext/fp_extins.rs | 2 +- .../src/T32/w/cpaf/advsimdext/fp_minmax.rs | 2 +- .../src/T32/w/cpaf/advsimdext/fp_toint.rs | 2 +- .../T32/w/cpaf/advsimdext/simd_3sameext.rs | 2 +- .../src/T32/w/cpaf/advsimdext/tfloatdpmac.rs | 2 +- .../T32/w/cpaf/advsimdext/tsimd_dotprod.rs | 2 +- aarchmrs-instructions/src/T32/w/cpaf/fpdp.rs | 2 +- .../src/T32/w/cpaf/fpdp/fp_2r.rs | 2 +- .../src/T32/w/cpaf/fpdp/fp_3r.rs | 2 +- .../src/T32/w/cpaf/fpdp/fp_movi.rs | 2 +- .../src/T32/w/cpaf/simddp.rs | 2 +- .../src/T32/w/cpaf/simddp/simd_3same.rs | 2 +- .../src/T32/w/cpaf/simddp/t_simd_12reg.rs | 2 +- .../w/cpaf/simddp/t_simd_12reg/simd_1r_imm.rs | 2 +- .../cpaf/simddp/t_simd_12reg/simd_2r_shift.rs | 2 +- .../src/T32/w/cpaf/simddp/t_simd_mulreg.rs | 2 +- .../cpaf/simddp/t_simd_mulreg/simd_2r_misc.rs | 2 +- .../w/cpaf/simddp/t_simd_mulreg/simd_2r_sc.rs | 2 +- .../w/cpaf/simddp/t_simd_mulreg/simd_3diff.rs | 2 +- .../cpaf/simddp/t_simd_mulreg/simd_dup_sc.rs | 2 +- .../w/cpaf/simddp/t_simd_mulreg/simd_ext.rs | 2 +- .../w/cpaf/simddp/t_simd_mulreg/simd_tbl.rs | 2 +- .../src/T32/w/cpaf/sys_mov32.rs | 2 +- .../src/T32/w/cpaf/sys_mov32/cp_mov32.rs | 2 +- .../src/T32/w/cpaf/sys_mov32/fp_mov16.rs | 2 +- .../src/T32/w/cpaf/sys_mov32/fp_mov32.rs | 2 +- .../src/T32/w/cpaf/sys_mov32/fp_msr.rs | 2 +- .../src/T32/w/cpaf/sys_mov32/simd_dup_el.rs | 2 +- .../src/T32/w/cpaf/sysldst_mov64.rs | 2 +- .../src/T32/w/cpaf/sysldst_mov64/cp_ldst.rs | 2 +- .../src/T32/w/cpaf/sysldst_mov64/cp_mov64.rs | 2 +- .../T32/w/cpaf/sysldst_mov64/simdfp_ldst.rs | 2 +- .../T32/w/cpaf/sysldst_mov64/simdfp_mov64.rs | 2 +- aarchmrs-instructions/src/T32/w/dpint_immm.rs | 2 +- .../src/T32/w/dpint_shiftr.rs | 2 +- aarchmrs-instructions/src/T32/w/dstd.rs | 2 +- .../src/T32/w/dstd/ldastl.rs | 2 +- .../src/T32/w/dstd/lddlit.rs | 2 +- .../src/T32/w/dstd/ldstd_imm.rs | 2 +- .../src/T32/w/dstd/ldstd_post.rs | 2 +- .../src/T32/w/dstd/ldstd_pre.rs | 2 +- .../src/T32/w/dstd/ldstex.rs | 2 +- .../src/T32/w/dstd/ldstex_bhd.rs | 2 +- aarchmrs-instructions/src/T32/w/dstd/tblbr.rs | 2 +- aarchmrs-instructions/src/T32/w/imm.rs | 2 +- .../src/T32/w/imm/dpint_imms.rs | 2 +- aarchmrs-instructions/src/T32/w/imm/movw.rs | 2 +- .../src/T32/w/imm/sat_bit.rs | 2 +- aarchmrs-instructions/src/T32/w/ldst.rs | 2 +- .../src/T32/w/ldst/ldlit_signed.rs | 2 +- .../ldlit_signed/ldlit_signed_reserved.rs | 2 +- .../src/T32/w/ldst/ldlit_unsigned.rs | 2 +- .../src/T32/w/ldst/ldst_signed_nimm.rs | 2 +- .../ldst_signed_nimm_reserved.rs | 2 +- .../src/T32/w/ldst/ldst_signed_pimm.rs | 2 +- .../ldst_signed_pimm_reserved.rs | 2 +- .../src/T32/w/ldst/ldst_signed_post.rs | 2 +- .../src/T32/w/ldst/ldst_signed_pre.rs | 2 +- .../src/T32/w/ldst/ldst_signed_reg.rs | 2 +- .../ldst_signed_reg_reserved.rs | 2 +- .../src/T32/w/ldst/ldst_signed_unpriv.rs | 2 +- .../src/T32/w/ldst/ldst_unsigned_nimm.rs | 2 +- .../src/T32/w/ldst/ldst_unsigned_pimm.rs | 2 +- .../src/T32/w/ldst/ldst_unsigned_post.rs | 2 +- .../src/T32/w/ldst/ldst_unsigned_pre.rs | 2 +- .../src/T32/w/ldst/ldst_unsigned_reg.rs | 2 +- .../src/T32/w/ldst/ldst_unsigned_unpriv.rs | 2 +- aarchmrs-instructions/src/T32/w/ldstm.rs | 2 +- aarchmrs-instructions/src/T32/w/lmul_div.rs | 2 +- .../src/T32/w/lmul_div/div.rs | 2 +- .../src/T32/w/lmul_div/lmul.rs | 2 +- aarchmrs-instructions/src/T32/w/mul.rs | 2 +- .../src/T32/w/mul/mul_abd.rs | 2 +- aarchmrs-instructions/src/T32/w/reg.rs | 2 +- .../src/T32/w/reg/addsub_par.rs | 2 +- .../src/T32/w/reg/dpint_2r.rs | 2 +- .../T32/w/reg/dpint_2r/dpint_2r_unpred_0.rs | 2 +- .../T32/w/reg/dpint_2r/dpint_2r_unpred_1.rs | 2 +- .../src/T32/w/reg/extendr.rs | 2 +- aarchmrs-instructions/src/T32/w/reg/shiftr.rs | 2 +- aarchmrs-instructions/src/T32/w/vldst.rs | 2 +- .../src/T32/w/vldst/asimldall.rs | 2 +- .../src/T32/w/vldst/asimldstms.rs | 2 +- .../src/T32/w/vldst/asimldstss.rs | 2 +- aarchmrs-instructions/src/lib.rs | 2 +- 1025 files changed, 1071 insertions(+), 1071 deletions(-) diff --git a/aarchmrs-instructions/README.md b/aarchmrs-instructions/README.md index a65db05..4376c13 100644 --- a/aarchmrs-instructions/README.md +++ b/aarchmrs-instructions/README.md @@ -9,7 +9,7 @@ instruction variant described in the dataset, a corresponding Rust function is generated. The source code of this crate is generated by tools at the same repository at -https://github.com/monoid/harm. +. As with the original dataset, this code is licensed under BSD-3-Clause license. diff --git a/aarchmrs-instructions/src/A32.rs b/aarchmrs-instructions/src/A32.rs index 0293c87..fa26310 100644 --- a/aarchmrs-instructions/src/A32.rs +++ b/aarchmrs-instructions/src/A32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/brblk.rs b/aarchmrs-instructions/src/A32/brblk.rs index 4ca36bd..12c2638 100644 --- a/aarchmrs-instructions/src/A32/brblk.rs +++ b/aarchmrs-instructions/src/A32/brblk.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/brblk/b_imm.rs b/aarchmrs-instructions/src/A32/brblk/b_imm.rs index 461f101..79fdadb 100644 --- a/aarchmrs-instructions/src/A32/brblk/b_imm.rs +++ b/aarchmrs-instructions/src/A32/brblk/b_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/brblk/ldstexcept.rs b/aarchmrs-instructions/src/A32/brblk/ldstexcept.rs index 98bcd82..f8e418a 100644 --- a/aarchmrs-instructions/src/A32/brblk/ldstexcept.rs +++ b/aarchmrs-instructions/src/A32/brblk/ldstexcept.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/brblk/ldstm.rs b/aarchmrs-instructions/src/A32/brblk/ldstm.rs index 41f6550..f292012 100644 --- a/aarchmrs-instructions/src/A32/brblk/ldstm.rs +++ b/aarchmrs-instructions/src/A32/brblk/ldstm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as.rs b/aarchmrs-instructions/src/A32/cops_as.rs index b590cf2..c2751e4 100644 --- a/aarchmrs-instructions/src/A32/cops_as.rs +++ b/aarchmrs-instructions/src/A32/cops_as.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/advsimdext.rs b/aarchmrs-instructions/src/A32/cops_as/advsimdext.rs index 3811ff5..76e5c7f 100644 --- a/aarchmrs-instructions/src/A32/cops_as/advsimdext.rs +++ b/aarchmrs-instructions/src/A32/cops_as/advsimdext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/advsimdext/floatdpmac.rs b/aarchmrs-instructions/src/A32/cops_as/advsimdext/floatdpmac.rs index 40e6a5d..392e558 100644 --- a/aarchmrs-instructions/src/A32/cops_as/advsimdext/floatdpmac.rs +++ b/aarchmrs-instructions/src/A32/cops_as/advsimdext/floatdpmac.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpcsel.rs b/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpcsel.rs index 3f1292a..debec79 100644 --- a/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpcsel.rs +++ b/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpcsel.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpcvtrnd.rs b/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpcvtrnd.rs index f4b7342..a591f46 100644 --- a/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpcvtrnd.rs +++ b/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpcvtrnd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpextins.rs b/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpextins.rs index 957bf04..003629f 100644 --- a/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpextins.rs +++ b/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpextins.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpminmaxnm.rs b/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpminmaxnm.rs index 71a7840..a189448 100644 --- a/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpminmaxnm.rs +++ b/aarchmrs-instructions/src/A32/cops_as/advsimdext/fpminmaxnm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/advsimdext/simd3reg_sameext.rs b/aarchmrs-instructions/src/A32/cops_as/advsimdext/simd3reg_sameext.rs index 7cde774..24ae2cb 100644 --- a/aarchmrs-instructions/src/A32/cops_as/advsimdext/simd3reg_sameext.rs +++ b/aarchmrs-instructions/src/A32/cops_as/advsimdext/simd3reg_sameext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/advsimdext/simd_dotprod.rs b/aarchmrs-instructions/src/A32/cops_as/advsimdext/simd_dotprod.rs index 0ed2ed6..d896c93 100644 --- a/aarchmrs-instructions/src/A32/cops_as/advsimdext/simd_dotprod.rs +++ b/aarchmrs-instructions/src/A32/cops_as/advsimdext/simd_dotprod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/fpdp.rs b/aarchmrs-instructions/src/A32/cops_as/fpdp.rs index 51dbb50..8b48c00 100644 --- a/aarchmrs-instructions/src/A32/cops_as/fpdp.rs +++ b/aarchmrs-instructions/src/A32/cops_as/fpdp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/fpdp/fpdp2reg.rs b/aarchmrs-instructions/src/A32/cops_as/fpdp/fpdp2reg.rs index bb2708f..adef38a 100644 --- a/aarchmrs-instructions/src/A32/cops_as/fpdp/fpdp2reg.rs +++ b/aarchmrs-instructions/src/A32/cops_as/fpdp/fpdp2reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/fpdp/fpdp3reg.rs b/aarchmrs-instructions/src/A32/cops_as/fpdp/fpdp3reg.rs index 935bf47..8d046e6 100644 --- a/aarchmrs-instructions/src/A32/cops_as/fpdp/fpdp3reg.rs +++ b/aarchmrs-instructions/src/A32/cops_as/fpdp/fpdp3reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/fpdp/fpimm.rs b/aarchmrs-instructions/src/A32/cops_as/fpdp/fpimm.rs index a6fb39d..6270ed6 100644 --- a/aarchmrs-instructions/src/A32/cops_as/fpdp/fpimm.rs +++ b/aarchmrs-instructions/src/A32/cops_as/fpdp/fpimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/svcall.rs b/aarchmrs-instructions/src/A32/cops_as/svcall.rs index bab572d..41bd376 100644 --- a/aarchmrs-instructions/src/A32/cops_as/svcall.rs +++ b/aarchmrs-instructions/src/A32/cops_as/svcall.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/svcall/svc.rs b/aarchmrs-instructions/src/A32/cops_as/svcall/svc.rs index 0684fec..47b91ee 100644 --- a/aarchmrs-instructions/src/A32/cops_as/svcall/svc.rs +++ b/aarchmrs-instructions/src/A32/cops_as/svcall/svc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sys_mov32.rs b/aarchmrs-instructions/src/A32/cops_as/sys_mov32.rs index 9582ac7..0ae280a 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sys_mov32.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sys_mov32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movcpgp32.rs b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movcpgp32.rs index 0d8d22c..779e5e6 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movcpgp32.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movcpgp32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpgp16.rs b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpgp16.rs index be003bb..9abfe4b 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpgp16.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpgp16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpgp32.rs b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpgp32.rs index c13ff41..b955202 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpgp32.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpgp32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpsr.rs b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpsr.rs index a23ffad..c3603d4 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpsr.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movfpsr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movsimdgp.rs b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movsimdgp.rs index 47fd185..8e99edd 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movsimdgp.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sys_mov32/movsimdgp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64.rs b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64.rs index 0d04f4b..47317d2 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/ldstcp.rs b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/ldstcp.rs index 2c26faa..ac56a87 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/ldstcp.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/ldstcp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/ldstsimdfp.rs b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/ldstsimdfp.rs index a186bc3..d1cd67a 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/ldstsimdfp.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/ldstsimdfp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/movcpgp64.rs b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/movcpgp64.rs index f66ff29..fa7dad0 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/movcpgp64.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/movcpgp64.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/movsimdfpgp64.rs b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/movsimdfpgp64.rs index 4d0e038..3cf02f2 100644 --- a/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/movsimdfpgp64.rs +++ b/aarchmrs-instructions/src/A32/cops_as/sysldst_mov64/movsimdfpgp64.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp.rs b/aarchmrs-instructions/src/A32/dp.rs index 48facab..94e8375 100644 --- a/aarchmrs-instructions/src/A32/dp.rs +++ b/aarchmrs-instructions/src/A32/dp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpimm.rs b/aarchmrs-instructions/src/A32/dp/dpimm.rs index c910096..1a7a766 100644 --- a/aarchmrs-instructions/src/A32/dp/dpimm.rs +++ b/aarchmrs-instructions/src/A32/dp/dpimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpimm/intdp1reg_imm.rs b/aarchmrs-instructions/src/A32/dp/dpimm/intdp1reg_imm.rs index 235936a..6c0c799 100644 --- a/aarchmrs-instructions/src/A32/dp/dpimm/intdp1reg_imm.rs +++ b/aarchmrs-instructions/src/A32/dp/dpimm/intdp1reg_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpimm/intdp2reg_imm.rs b/aarchmrs-instructions/src/A32/dp/dpimm/intdp2reg_imm.rs index f5d27ce..4e99a85 100644 --- a/aarchmrs-instructions/src/A32/dp/dpimm/intdp2reg_imm.rs +++ b/aarchmrs-instructions/src/A32/dp/dpimm/intdp2reg_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpimm/log2reg_imm.rs b/aarchmrs-instructions/src/A32/dp/dpimm/log2reg_imm.rs index bd8803a..11aaab2 100644 --- a/aarchmrs-instructions/src/A32/dp/dpimm/log2reg_imm.rs +++ b/aarchmrs-instructions/src/A32/dp/dpimm/log2reg_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpimm/movsr_hint_imm.rs b/aarchmrs-instructions/src/A32/dp/dpimm/movsr_hint_imm.rs index 9a6f8a4..68fd1ba 100644 --- a/aarchmrs-instructions/src/A32/dp/dpimm/movsr_hint_imm.rs +++ b/aarchmrs-instructions/src/A32/dp/dpimm/movsr_hint_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpimm/movw.rs b/aarchmrs-instructions/src/A32/dp/dpimm/movw.rs index 7550725..fa13be9 100644 --- a/aarchmrs-instructions/src/A32/dp/dpimm/movw.rs +++ b/aarchmrs-instructions/src/A32/dp/dpimm/movw.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc.rs b/aarchmrs-instructions/src/A32/dp/dpmisc.rs index 9b928f0..8a4c172 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc/blx_reg.rs b/aarchmrs-instructions/src/A32/dp/dpmisc/blx_reg.rs index 108f959..c7dd59f 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc/blx_reg.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc/blx_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc/bx_reg.rs b/aarchmrs-instructions/src/A32/dp/dpmisc/bx_reg.rs index 34c548a..52d5773 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc/bx_reg.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc/bx_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc/bxj_reg.rs b/aarchmrs-instructions/src/A32/dp/dpmisc/bxj_reg.rs index 21cec5d..fc0ba88 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc/bxj_reg.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc/bxj_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc/clz.rs b/aarchmrs-instructions/src/A32/dp/dpmisc/clz.rs index a399140..32f5254 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc/clz.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc/clz.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc/crc32.rs b/aarchmrs-instructions/src/A32/dp/dpmisc/crc32.rs index e91e8f6..b963289 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc/crc32.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc/crc32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc/eret.rs b/aarchmrs-instructions/src/A32/dp/dpmisc/eret.rs index 9d48f9d..f660aff 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc/eret.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc/eret.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc/except.rs b/aarchmrs-instructions/src/A32/dp/dpmisc/except.rs index 7002ec2..0e1029c 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc/except.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc/except.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc/intsat.rs b/aarchmrs-instructions/src/A32/dp/dpmisc/intsat.rs index 9588451..a4d4ad8 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc/intsat.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc/intsat.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpmisc/movsr_reg.rs b/aarchmrs-instructions/src/A32/dp/dpmisc/movsr_reg.rs index 8af3340..cbb93bc 100644 --- a/aarchmrs-instructions/src/A32/dp/dpmisc/movsr_reg.rs +++ b/aarchmrs-instructions/src/A32/dp/dpmisc/movsr_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpregis.rs b/aarchmrs-instructions/src/A32/dp/dpregis.rs index 301b5bf..fa7dd1e 100644 --- a/aarchmrs-instructions/src/A32/dp/dpregis.rs +++ b/aarchmrs-instructions/src/A32/dp/dpregis.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpregis/intdp2reg_immsh.rs b/aarchmrs-instructions/src/A32/dp/dpregis/intdp2reg_immsh.rs index e8a16b3..976164b 100644 --- a/aarchmrs-instructions/src/A32/dp/dpregis/intdp2reg_immsh.rs +++ b/aarchmrs-instructions/src/A32/dp/dpregis/intdp2reg_immsh.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpregis/intdp3reg_immsh.rs b/aarchmrs-instructions/src/A32/dp/dpregis/intdp3reg_immsh.rs index bf8e67d..8f0a078 100644 --- a/aarchmrs-instructions/src/A32/dp/dpregis/intdp3reg_immsh.rs +++ b/aarchmrs-instructions/src/A32/dp/dpregis/intdp3reg_immsh.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpregis/logic3reg_immsh.rs b/aarchmrs-instructions/src/A32/dp/dpregis/logic3reg_immsh.rs index a28bdd5..d186565 100644 --- a/aarchmrs-instructions/src/A32/dp/dpregis/logic3reg_immsh.rs +++ b/aarchmrs-instructions/src/A32/dp/dpregis/logic3reg_immsh.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpregrs.rs b/aarchmrs-instructions/src/A32/dp/dpregrs.rs index 685628b..cb3aced 100644 --- a/aarchmrs-instructions/src/A32/dp/dpregrs.rs +++ b/aarchmrs-instructions/src/A32/dp/dpregrs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpregrs/intdp2reg_regsh.rs b/aarchmrs-instructions/src/A32/dp/dpregrs/intdp2reg_regsh.rs index b2b917c..b8eae16 100644 --- a/aarchmrs-instructions/src/A32/dp/dpregrs/intdp2reg_regsh.rs +++ b/aarchmrs-instructions/src/A32/dp/dpregrs/intdp2reg_regsh.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpregrs/intdp3reg_regsh.rs b/aarchmrs-instructions/src/A32/dp/dpregrs/intdp3reg_regsh.rs index 489c578..cb2e97b 100644 --- a/aarchmrs-instructions/src/A32/dp/dpregrs/intdp3reg_regsh.rs +++ b/aarchmrs-instructions/src/A32/dp/dpregrs/intdp3reg_regsh.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/dpregrs/logic3reg_regsh.rs b/aarchmrs-instructions/src/A32/dp/dpregrs/logic3reg_regsh.rs index f95b2c4..aa61f47 100644 --- a/aarchmrs-instructions/src/A32/dp/dpregrs/logic3reg_regsh.rs +++ b/aarchmrs-instructions/src/A32/dp/dpregrs/logic3reg_regsh.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/mul_half.rs b/aarchmrs-instructions/src/A32/dp/mul_half.rs index d38cd04..58a49dd 100644 --- a/aarchmrs-instructions/src/A32/dp/mul_half.rs +++ b/aarchmrs-instructions/src/A32/dp/mul_half.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/mul_word.rs b/aarchmrs-instructions/src/A32/dp/mul_word.rs index 9008730..9ffbb2b 100644 --- a/aarchmrs-instructions/src/A32/dp/mul_word.rs +++ b/aarchmrs-instructions/src/A32/dp/mul_word.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/sync.rs b/aarchmrs-instructions/src/A32/dp/sync.rs index 5e6015f..40d1d46 100644 --- a/aarchmrs-instructions/src/A32/dp/sync.rs +++ b/aarchmrs-instructions/src/A32/dp/sync.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/sync/ldst_excl.rs b/aarchmrs-instructions/src/A32/dp/sync/ldst_excl.rs index 0e77d1c..6e161ae 100644 --- a/aarchmrs-instructions/src/A32/dp/sync/ldst_excl.rs +++ b/aarchmrs-instructions/src/A32/dp/sync/ldst_excl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/xldst.rs b/aarchmrs-instructions/src/A32/dp/xldst.rs index 722b9a9..2b45934 100644 --- a/aarchmrs-instructions/src/A32/dp/xldst.rs +++ b/aarchmrs-instructions/src/A32/dp/xldst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/xldst/ldstximm.rs b/aarchmrs-instructions/src/A32/dp/xldst/ldstximm.rs index 90d496f..b923b67 100644 --- a/aarchmrs-instructions/src/A32/dp/xldst/ldstximm.rs +++ b/aarchmrs-instructions/src/A32/dp/xldst/ldstximm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/dp/xldst/ldstxreg.rs b/aarchmrs-instructions/src/A32/dp/xldst/ldstxreg.rs index f4a5f1b..dc73eaf 100644 --- a/aarchmrs-instructions/src/A32/dp/xldst/ldstxreg.rs +++ b/aarchmrs-instructions/src/A32/dp/xldst/ldstxreg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/ldstimm.rs b/aarchmrs-instructions/src/A32/ldstimm.rs index 92e1729..77e8b37 100644 --- a/aarchmrs-instructions/src/A32/ldstimm.rs +++ b/aarchmrs-instructions/src/A32/ldstimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/ldstreg.rs b/aarchmrs-instructions/src/A32/ldstreg.rs index bf59043..903cab1 100644 --- a/aarchmrs-instructions/src/A32/ldstreg.rs +++ b/aarchmrs-instructions/src/A32/ldstreg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media.rs b/aarchmrs-instructions/src/A32/media.rs index 73a3a32..2be7461 100644 --- a/aarchmrs-instructions/src/A32/media.rs +++ b/aarchmrs-instructions/src/A32/media.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/bfi.rs b/aarchmrs-instructions/src/A32/media/bfi.rs index c0d590e..7ef2d18 100644 --- a/aarchmrs-instructions/src/A32/media/bfi.rs +++ b/aarchmrs-instructions/src/A32/media/bfi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/bfx.rs b/aarchmrs-instructions/src/A32/media/bfx.rs index 1448abf..205ea46 100644 --- a/aarchmrs-instructions/src/A32/media/bfx.rs +++ b/aarchmrs-instructions/src/A32/media/bfx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/extend.rs b/aarchmrs-instructions/src/A32/media/extend.rs index 86eff3b..7b639d9 100644 --- a/aarchmrs-instructions/src/A32/media/extend.rs +++ b/aarchmrs-instructions/src/A32/media/extend.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/pack.rs b/aarchmrs-instructions/src/A32/media/pack.rs index 637e09a..027314c 100644 --- a/aarchmrs-instructions/src/A32/media/pack.rs +++ b/aarchmrs-instructions/src/A32/media/pack.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/parallel.rs b/aarchmrs-instructions/src/A32/media/parallel.rs index e5514f5..c8830f9 100644 --- a/aarchmrs-instructions/src/A32/media/parallel.rs +++ b/aarchmrs-instructions/src/A32/media/parallel.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/reverse.rs b/aarchmrs-instructions/src/A32/media/reverse.rs index a51fb41..8dadfab 100644 --- a/aarchmrs-instructions/src/A32/media/reverse.rs +++ b/aarchmrs-instructions/src/A32/media/reverse.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/sat16.rs b/aarchmrs-instructions/src/A32/media/sat16.rs index 738bc3c..4617704 100644 --- a/aarchmrs-instructions/src/A32/media/sat16.rs +++ b/aarchmrs-instructions/src/A32/media/sat16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/sat32.rs b/aarchmrs-instructions/src/A32/media/sat32.rs index 53a83b7..ed2bcb8 100644 --- a/aarchmrs-instructions/src/A32/media/sat32.rs +++ b/aarchmrs-instructions/src/A32/media/sat32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/selbytes.rs b/aarchmrs-instructions/src/A32/media/selbytes.rs index 0208016..587feb7 100644 --- a/aarchmrs-instructions/src/A32/media/selbytes.rs +++ b/aarchmrs-instructions/src/A32/media/selbytes.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/smul_div.rs b/aarchmrs-instructions/src/A32/media/smul_div.rs index 6204bca..df50b05 100644 --- a/aarchmrs-instructions/src/A32/media/smul_div.rs +++ b/aarchmrs-instructions/src/A32/media/smul_div.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/udf.rs b/aarchmrs-instructions/src/A32/media/udf.rs index 70c2d62..b22e671 100644 --- a/aarchmrs-instructions/src/A32/media/udf.rs +++ b/aarchmrs-instructions/src/A32/media/udf.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/media/usad.rs b/aarchmrs-instructions/src/A32/media/usad.rs index 1e5867d..6c2c0fa 100644 --- a/aarchmrs-instructions/src/A32/media/usad.rs +++ b/aarchmrs-instructions/src/A32/media/usad.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as.rs b/aarchmrs-instructions/src/A32/uncond_as.rs index 02fb627..c8c58f4 100644 --- a/aarchmrs-instructions/src/A32/uncond_as.rs +++ b/aarchmrs-instructions/src/A32/uncond_as.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp.rs index face477..3783c4b 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg.rs index 7258f8f..c901edc 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg/simd1reg_imm.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg/simd1reg_imm.rs index 45fe75a..1cb18b0 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg/simd1reg_imm.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg/simd1reg_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg/simd2reg_shift.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg/simd2reg_shift.rs index 928528d..e15abe2 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg/simd2reg_shift.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_12reg/simd2reg_shift.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg.rs index 228287b..184ce93 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_dup.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_dup.rs index 7c2fe06..b17f377 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_dup.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_dup.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_misc.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_misc.rs index 0e55bbd..8a8f353 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_misc.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_misc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_scalar.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_scalar.rs index 90ef460..f5645ba 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_scalar.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd2reg_scalar.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_diff.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_diff.rs index 8415874..9065482 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_diff.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_diff.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_ext.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_ext.rs index c222083..51527b9 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_ext.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_ext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_tbl.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_tbl.rs index fc3cf5c..fb569bd 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_tbl.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/a_simd_mulreg/simd3reg_tbl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/simd3reg_same.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/simd3reg_same.rs index b0788c6..a3ba0ba 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimddp/simd3reg_same.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimddp/simd3reg_same.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimdls.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimdls.rs index 4cd878b..345d890 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimdls.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimdls.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldstv_ms.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldstv_ms.rs index 626c2cb..f5f52a7 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldstv_ms.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldstv_ms.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldstv_ssone.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldstv_ssone.rs index d2b2cc0..89afcbd 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldstv_ssone.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldstv_ssone.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldv_ssall.rs b/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldv_ssall.rs index 0ba06f3..2b0a949 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldv_ssall.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/advsimdls/ldv_ssall.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondhints.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondhints.rs index 98f28b2..e68361a 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondhints.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondhints.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/barriers.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/barriers.rs index e169d13..43caa26 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/barriers.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/barriers.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/preload_imm.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/preload_imm.rs index 8a2617c..d7d0190 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/preload_imm.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/preload_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/preload_reg.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/preload_reg.rs index 25b3a38..51ba32f 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/preload_reg.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/preload_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_0.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_0.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_0.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_1.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_1.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_1.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_2.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_2.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_2.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_3.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_3.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_3.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondhints/uncondhints_UNPRED_3.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondmisc.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondmisc.rs index e3fc0a0..7a3fe94 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondmisc.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondmisc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/cps.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/cps.rs index 3ab0c7e..eaeddb4 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/cps.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/cps.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/setpan.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/setpan.rs index 5bc091a..440d8ef 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/setpan.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/setpan.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/uncondmisc_unpred.rs b/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/uncondmisc_unpred.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/uncondmisc_unpred.rs +++ b/aarchmrs-instructions/src/A32/uncond_as/uncondmisc/uncondmisc_unpred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64.rs b/aarchmrs-instructions/src/A64.rs index f9c1039..d6f12c6 100644 --- a/aarchmrs-instructions/src/A64.rs +++ b/aarchmrs-instructions/src/A64.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control.rs b/aarchmrs-instructions/src/A64/control.rs index a923bc7..35f98a6 100644 --- a/aarchmrs-instructions/src/A64/control.rs +++ b/aarchmrs-instructions/src/A64/control.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/barriers.rs b/aarchmrs-instructions/src/A64/control/barriers.rs index ece86a1..7044693 100644 --- a/aarchmrs-instructions/src/A64/control/barriers.rs +++ b/aarchmrs-instructions/src/A64/control/barriers.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/branch_imm.rs b/aarchmrs-instructions/src/A64/control/branch_imm.rs index 473c502..161b20e 100644 --- a/aarchmrs-instructions/src/A64/control/branch_imm.rs +++ b/aarchmrs-instructions/src/A64/control/branch_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/branch_reg.rs b/aarchmrs-instructions/src/A64/control/branch_reg.rs index 3308265..3d8c729 100644 --- a/aarchmrs-instructions/src/A64/control/branch_reg.rs +++ b/aarchmrs-instructions/src/A64/control/branch_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/compbranch.rs b/aarchmrs-instructions/src/A64/control/compbranch.rs index ffe3f04..6b690f4 100644 --- a/aarchmrs-instructions/src/A64/control/compbranch.rs +++ b/aarchmrs-instructions/src/A64/control/compbranch.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/compbranch_imm.rs b/aarchmrs-instructions/src/A64/control/compbranch_imm.rs index 9ea5147..93a8e49 100644 --- a/aarchmrs-instructions/src/A64/control/compbranch_imm.rs +++ b/aarchmrs-instructions/src/A64/control/compbranch_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/compbranch_regs.rs b/aarchmrs-instructions/src/A64/control/compbranch_regs.rs index 63d7116..7c9cce8 100644 --- a/aarchmrs-instructions/src/A64/control/compbranch_regs.rs +++ b/aarchmrs-instructions/src/A64/control/compbranch_regs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/compbranch_regs2.rs b/aarchmrs-instructions/src/A64/control/compbranch_regs2.rs index f0ef4ba..e091f24 100644 --- a/aarchmrs-instructions/src/A64/control/compbranch_regs2.rs +++ b/aarchmrs-instructions/src/A64/control/compbranch_regs2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/condbranch.rs b/aarchmrs-instructions/src/A64/control/condbranch.rs index 2cfe45b..3421c67 100644 --- a/aarchmrs-instructions/src/A64/control/condbranch.rs +++ b/aarchmrs-instructions/src/A64/control/condbranch.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/exception.rs b/aarchmrs-instructions/src/A64/control/exception.rs index fecbd7c..20b9437 100644 --- a/aarchmrs-instructions/src/A64/control/exception.rs +++ b/aarchmrs-instructions/src/A64/control/exception.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/hints.rs b/aarchmrs-instructions/src/A64/control/hints.rs index 9c0cb5f..b5e145b 100644 --- a/aarchmrs-instructions/src/A64/control/hints.rs +++ b/aarchmrs-instructions/src/A64/control/hints.rs @@ -1,42 +1,8 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ -pub mod HINT_HM_hints { - #[cfg(feature = "meta")] - pub const OPCODE_MASK: u32 = 0b11111111111111111111000000011111u32; - #[cfg(feature = "meta")] - pub const OPCODE: u32 = 0b11010101000000110010000000011111u32; - #[cfg(feature = "meta")] - pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32; - #[cfg(feature = "meta")] - pub const NAME: &str = "HINT_HM_hints"; - #[cfg(feature = "meta_field")] - #[allow(nonstandard_style)] - pub const FIELD_op2_OFFSET: u32 = 5u32; - #[cfg(feature = "meta_field")] - #[allow(nonstandard_style)] - pub const FIELD_op2_WIDTH: u32 = 3u32; - #[cfg(feature = "meta_field")] - #[allow(nonstandard_style)] - pub const FIELD_CRm_OFFSET: u32 = 8u32; - #[cfg(feature = "meta_field")] - #[allow(nonstandard_style)] - pub const FIELD_CRm_WIDTH: u32 = 4u32; - #[inline] - pub const fn HINT_HM_hints( - CRm: ::aarchmrs_types::BitValue<4>, - op2: ::aarchmrs_types::BitValue<3>, - ) -> ::aarchmrs_types::InstructionCode { - ::aarchmrs_types::InstructionCode::from_u32( - 0b11010101000000110010u32 << 12u32 - | CRm.into_inner() << 8u32 - | op2.into_inner() << 5u32 - | 0b11111u32 << 0u32, - ) - } -} pub mod NOP_HI_hints { #[cfg(feature = "meta")] pub const OPCODE_MASK: u32 = 0b11111111111111111111111111111111u32; @@ -515,3 +481,37 @@ pub mod STCPH_HI_hints { ::aarchmrs_types::InstructionCode::from_u32(0b11010101000000110010011010011111u32 << 0u32) } } +pub mod HINT_HM_hints { + #[cfg(feature = "meta")] + pub const OPCODE_MASK: u32 = 0b11111111111111111111000000011111u32; + #[cfg(feature = "meta")] + pub const OPCODE: u32 = 0b11010101000000110010000000011111u32; + #[cfg(feature = "meta")] + pub const SHOULD_BE_MASK: u32 = 0b00000000000000000000000000000000u32; + #[cfg(feature = "meta")] + pub const NAME: &str = "HINT_HM_hints"; + #[cfg(feature = "meta_field")] + #[allow(nonstandard_style)] + pub const FIELD_op2_OFFSET: u32 = 5u32; + #[cfg(feature = "meta_field")] + #[allow(nonstandard_style)] + pub const FIELD_op2_WIDTH: u32 = 3u32; + #[cfg(feature = "meta_field")] + #[allow(nonstandard_style)] + pub const FIELD_CRm_OFFSET: u32 = 8u32; + #[cfg(feature = "meta_field")] + #[allow(nonstandard_style)] + pub const FIELD_CRm_WIDTH: u32 = 4u32; + #[inline] + pub const fn HINT_HM_hints( + CRm: ::aarchmrs_types::BitValue<4>, + op2: ::aarchmrs_types::BitValue<3>, + ) -> ::aarchmrs_types::InstructionCode { + ::aarchmrs_types::InstructionCode::from_u32( + 0b11010101000000110010u32 << 12u32 + | CRm.into_inner() << 8u32 + | op2.into_inner() << 5u32 + | 0b11111u32 << 0u32, + ) + } +} diff --git a/aarchmrs-instructions/src/A64/control/miscbranch.rs b/aarchmrs-instructions/src/A64/control/miscbranch.rs index bbe75ea..7832a20 100644 --- a/aarchmrs-instructions/src/A64/control/miscbranch.rs +++ b/aarchmrs-instructions/src/A64/control/miscbranch.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/pstate.rs b/aarchmrs-instructions/src/A64/control/pstate.rs index b5c9465..7d1073b 100644 --- a/aarchmrs-instructions/src/A64/control/pstate.rs +++ b/aarchmrs-instructions/src/A64/control/pstate.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/syspairinstrs.rs b/aarchmrs-instructions/src/A64/control/syspairinstrs.rs index 750a98d..13a6b4d 100644 --- a/aarchmrs-instructions/src/A64/control/syspairinstrs.rs +++ b/aarchmrs-instructions/src/A64/control/syspairinstrs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/systeminstrs.rs b/aarchmrs-instructions/src/A64/control/systeminstrs.rs index e26b473..1b016ab 100644 --- a/aarchmrs-instructions/src/A64/control/systeminstrs.rs +++ b/aarchmrs-instructions/src/A64/control/systeminstrs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/systeminstrswithreg.rs b/aarchmrs-instructions/src/A64/control/systeminstrswithreg.rs index f0f03d4..8f3d33a 100644 --- a/aarchmrs-instructions/src/A64/control/systeminstrswithreg.rs +++ b/aarchmrs-instructions/src/A64/control/systeminstrswithreg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/systemmove.rs b/aarchmrs-instructions/src/A64/control/systemmove.rs index 919fc61..da81308 100644 --- a/aarchmrs-instructions/src/A64/control/systemmove.rs +++ b/aarchmrs-instructions/src/A64/control/systemmove.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/systemmovepr.rs b/aarchmrs-instructions/src/A64/control/systemmovepr.rs index e25dfc7..3658e9d 100644 --- a/aarchmrs-instructions/src/A64/control/systemmovepr.rs +++ b/aarchmrs-instructions/src/A64/control/systemmovepr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/tchange_imm.rs b/aarchmrs-instructions/src/A64/control/tchange_imm.rs index 58fc63a..20203bf 100644 --- a/aarchmrs-instructions/src/A64/control/tchange_imm.rs +++ b/aarchmrs-instructions/src/A64/control/tchange_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/tchange_reg.rs b/aarchmrs-instructions/src/A64/control/tchange_reg.rs index 870b1f7..83d3220 100644 --- a/aarchmrs-instructions/src/A64/control/tchange_reg.rs +++ b/aarchmrs-instructions/src/A64/control/tchange_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/control/testbranch.rs b/aarchmrs-instructions/src/A64/control/testbranch.rs index 5ba46ed..3f4ae04 100644 --- a/aarchmrs-instructions/src/A64/control/testbranch.rs +++ b/aarchmrs-instructions/src/A64/control/testbranch.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm.rs b/aarchmrs-instructions/src/A64/dpimm.rs index d10f8d2..7346243 100644 --- a/aarchmrs-instructions/src/A64/dpimm.rs +++ b/aarchmrs-instructions/src/A64/dpimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm/addsub_imm.rs b/aarchmrs-instructions/src/A64/dpimm/addsub_imm.rs index c85a009..b69d635 100644 --- a/aarchmrs-instructions/src/A64/dpimm/addsub_imm.rs +++ b/aarchmrs-instructions/src/A64/dpimm/addsub_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm/addsub_immtags.rs b/aarchmrs-instructions/src/A64/dpimm/addsub_immtags.rs index 7bf3318..507f5c5 100644 --- a/aarchmrs-instructions/src/A64/dpimm/addsub_immtags.rs +++ b/aarchmrs-instructions/src/A64/dpimm/addsub_immtags.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm/bitfield.rs b/aarchmrs-instructions/src/A64/dpimm/bitfield.rs index bf4b809..1754a33 100644 --- a/aarchmrs-instructions/src/A64/dpimm/bitfield.rs +++ b/aarchmrs-instructions/src/A64/dpimm/bitfield.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm/dp_1src_imm.rs b/aarchmrs-instructions/src/A64/dpimm/dp_1src_imm.rs index bf7b982..d8c1bbb 100644 --- a/aarchmrs-instructions/src/A64/dpimm/dp_1src_imm.rs +++ b/aarchmrs-instructions/src/A64/dpimm/dp_1src_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm/extract.rs b/aarchmrs-instructions/src/A64/dpimm/extract.rs index c223f6e..c491771 100644 --- a/aarchmrs-instructions/src/A64/dpimm/extract.rs +++ b/aarchmrs-instructions/src/A64/dpimm/extract.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm/log_imm.rs b/aarchmrs-instructions/src/A64/dpimm/log_imm.rs index e0f5d2c..d209b58 100644 --- a/aarchmrs-instructions/src/A64/dpimm/log_imm.rs +++ b/aarchmrs-instructions/src/A64/dpimm/log_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm/minmax_imm.rs b/aarchmrs-instructions/src/A64/dpimm/minmax_imm.rs index fdb739e..bcf1108 100644 --- a/aarchmrs-instructions/src/A64/dpimm/minmax_imm.rs +++ b/aarchmrs-instructions/src/A64/dpimm/minmax_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm/movewide.rs b/aarchmrs-instructions/src/A64/dpimm/movewide.rs index 443f60b..c333f0e 100644 --- a/aarchmrs-instructions/src/A64/dpimm/movewide.rs +++ b/aarchmrs-instructions/src/A64/dpimm/movewide.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpimm/pcreladdr.rs b/aarchmrs-instructions/src/A64/dpimm/pcreladdr.rs index 369851e..aa9d6f8 100644 --- a/aarchmrs-instructions/src/A64/dpimm/pcreladdr.rs +++ b/aarchmrs-instructions/src/A64/dpimm/pcreladdr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg.rs b/aarchmrs-instructions/src/A64/dpreg.rs index af83bd8..ba78684 100644 --- a/aarchmrs-instructions/src/A64/dpreg.rs +++ b/aarchmrs-instructions/src/A64/dpreg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/addsub_carry.rs b/aarchmrs-instructions/src/A64/dpreg/addsub_carry.rs index 958e3ed..39038d5 100644 --- a/aarchmrs-instructions/src/A64/dpreg/addsub_carry.rs +++ b/aarchmrs-instructions/src/A64/dpreg/addsub_carry.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/addsub_ext.rs b/aarchmrs-instructions/src/A64/dpreg/addsub_ext.rs index 0389a4e..2a369b0 100644 --- a/aarchmrs-instructions/src/A64/dpreg/addsub_ext.rs +++ b/aarchmrs-instructions/src/A64/dpreg/addsub_ext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/addsub_pt.rs b/aarchmrs-instructions/src/A64/dpreg/addsub_pt.rs index 81bd446..11e9f91 100644 --- a/aarchmrs-instructions/src/A64/dpreg/addsub_pt.rs +++ b/aarchmrs-instructions/src/A64/dpreg/addsub_pt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/addsub_shift.rs b/aarchmrs-instructions/src/A64/dpreg/addsub_shift.rs index 9204b23..6c1c515 100644 --- a/aarchmrs-instructions/src/A64/dpreg/addsub_shift.rs +++ b/aarchmrs-instructions/src/A64/dpreg/addsub_shift.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/condcmp_imm.rs b/aarchmrs-instructions/src/A64/dpreg/condcmp_imm.rs index e8c6c43..1cddce6 100644 --- a/aarchmrs-instructions/src/A64/dpreg/condcmp_imm.rs +++ b/aarchmrs-instructions/src/A64/dpreg/condcmp_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/condcmp_reg.rs b/aarchmrs-instructions/src/A64/dpreg/condcmp_reg.rs index a1154ac..a12469b 100644 --- a/aarchmrs-instructions/src/A64/dpreg/condcmp_reg.rs +++ b/aarchmrs-instructions/src/A64/dpreg/condcmp_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/condsel.rs b/aarchmrs-instructions/src/A64/dpreg/condsel.rs index 7163387..30ecfab 100644 --- a/aarchmrs-instructions/src/A64/dpreg/condsel.rs +++ b/aarchmrs-instructions/src/A64/dpreg/condsel.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/dp_1src.rs b/aarchmrs-instructions/src/A64/dpreg/dp_1src.rs index b2e8d3a..49edee4 100644 --- a/aarchmrs-instructions/src/A64/dpreg/dp_1src.rs +++ b/aarchmrs-instructions/src/A64/dpreg/dp_1src.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/dp_2src.rs b/aarchmrs-instructions/src/A64/dpreg/dp_2src.rs index f84a752..2a7b2e2 100644 --- a/aarchmrs-instructions/src/A64/dpreg/dp_2src.rs +++ b/aarchmrs-instructions/src/A64/dpreg/dp_2src.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/dp_3src.rs b/aarchmrs-instructions/src/A64/dpreg/dp_3src.rs index 88e1114..75f39ad 100644 --- a/aarchmrs-instructions/src/A64/dpreg/dp_3src.rs +++ b/aarchmrs-instructions/src/A64/dpreg/dp_3src.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/log_shift.rs b/aarchmrs-instructions/src/A64/dpreg/log_shift.rs index e45e77c..a75fe12 100644 --- a/aarchmrs-instructions/src/A64/dpreg/log_shift.rs +++ b/aarchmrs-instructions/src/A64/dpreg/log_shift.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/rmif.rs b/aarchmrs-instructions/src/A64/dpreg/rmif.rs index 54df45e..f07e527 100644 --- a/aarchmrs-instructions/src/A64/dpreg/rmif.rs +++ b/aarchmrs-instructions/src/A64/dpreg/rmif.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/dpreg/setf.rs b/aarchmrs-instructions/src/A64/dpreg/setf.rs index 6fe5cf4..b4182ba 100644 --- a/aarchmrs-instructions/src/A64/dpreg/setf.rs +++ b/aarchmrs-instructions/src/A64/dpreg/setf.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst.rs b/aarchmrs-instructions/src/A64/ldst.rs index 7a575ce..519fdd0 100644 --- a/aarchmrs-instructions/src/A64/ldst.rs +++ b/aarchmrs-instructions/src/A64/ldst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/asisdlse.rs b/aarchmrs-instructions/src/A64/ldst/asisdlse.rs index 62c992e..44c3ccc 100644 --- a/aarchmrs-instructions/src/A64/ldst/asisdlse.rs +++ b/aarchmrs-instructions/src/A64/ldst/asisdlse.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/asisdlsep.rs b/aarchmrs-instructions/src/A64/ldst/asisdlsep.rs index dd5db99..54ce5e8 100644 --- a/aarchmrs-instructions/src/A64/ldst/asisdlsep.rs +++ b/aarchmrs-instructions/src/A64/ldst/asisdlsep.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/asisdlso.rs b/aarchmrs-instructions/src/A64/ldst/asisdlso.rs index 71eeb76..69223fb 100644 --- a/aarchmrs-instructions/src/A64/ldst/asisdlso.rs +++ b/aarchmrs-instructions/src/A64/ldst/asisdlso.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/asisdlsop.rs b/aarchmrs-instructions/src/A64/ldst/asisdlsop.rs index 9ffd5d1..667a09e 100644 --- a/aarchmrs-instructions/src/A64/ldst/asisdlsop.rs +++ b/aarchmrs-instructions/src/A64/ldst/asisdlsop.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/comswap.rs b/aarchmrs-instructions/src/A64/ldst/comswap.rs index d6ffadc..f329313 100644 --- a/aarchmrs-instructions/src/A64/ldst/comswap.rs +++ b/aarchmrs-instructions/src/A64/ldst/comswap.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/comswap_unpriv.rs b/aarchmrs-instructions/src/A64/ldst/comswap_unpriv.rs index b7e32d6..296821c 100644 --- a/aarchmrs-instructions/src/A64/ldst/comswap_unpriv.rs +++ b/aarchmrs-instructions/src/A64/ldst/comswap_unpriv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/comswappr.rs b/aarchmrs-instructions/src/A64/ldst/comswappr.rs index 7ddf1ce..10013fd 100644 --- a/aarchmrs-instructions/src/A64/ldst/comswappr.rs +++ b/aarchmrs-instructions/src/A64/ldst/comswappr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/comswappr_unpriv.rs b/aarchmrs-instructions/src/A64/ldst/comswappr_unpriv.rs index 241bd8a..4c2821d 100644 --- a/aarchmrs-instructions/src/A64/ldst/comswappr_unpriv.rs +++ b/aarchmrs-instructions/src/A64/ldst/comswappr_unpriv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldapstl_simd.rs b/aarchmrs-instructions/src/A64/ldst/ldapstl_simd.rs index 97f4ae7..d5a28ff 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldapstl_simd.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldapstl_simd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldapstl_unscaled.rs b/aarchmrs-instructions/src/A64/ldst/ldapstl_unscaled.rs index ff28067..8c78e08 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldapstl_unscaled.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldapstl_unscaled.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldapstl_writeback.rs b/aarchmrs-instructions/src/A64/ldst/ldapstl_writeback.rs index 12aaf29..b89b74b 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldapstl_writeback.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldapstl_writeback.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldiappstilp.rs b/aarchmrs-instructions/src/A64/ldst/ldiappstilp.rs index 00b8fd7..0960838 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldiappstilp.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldiappstilp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldst_gcs.rs b/aarchmrs-instructions/src/A64/ldst/ldst_gcs.rs index 29d68ee..6d8b50f 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldst_gcs.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldst_gcs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldst_immpost.rs b/aarchmrs-instructions/src/A64/ldst/ldst_immpost.rs index f27047f..43d0d25 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldst_immpost.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldst_immpost.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldst_immpre.rs b/aarchmrs-instructions/src/A64/ldst/ldst_immpre.rs index 41ed184..9e42c44 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldst_immpre.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldst_immpre.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldst_pac.rs b/aarchmrs-instructions/src/A64/ldst/ldst_pac.rs index d91b586..7b3bba3 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldst_pac.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldst_pac.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldst_pos.rs b/aarchmrs-instructions/src/A64/ldst/ldst_pos.rs index f1975e7..1368b0d 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldst_pos.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldst_pos.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldst_regoff.rs b/aarchmrs-instructions/src/A64/ldst/ldst_regoff.rs index 7f2b522..e8c6014 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldst_regoff.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldst_regoff.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldst_unpriv.rs b/aarchmrs-instructions/src/A64/ldst/ldst_unpriv.rs index c099190..486d98b 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldst_unpriv.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldst_unpriv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldst_unscaled.rs b/aarchmrs-instructions/src/A64/ldst/ldst_unscaled.rs index cf7cff6..14837fb 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldst_unscaled.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldst_unscaled.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldstexclp.rs b/aarchmrs-instructions/src/A64/ldst/ldstexclp.rs index 5ba6d40..e1a5554 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldstexclp.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldstexclp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldstexclr.rs b/aarchmrs-instructions/src/A64/ldst/ldstexclr.rs index 23917b7..43c78d7 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldstexclr.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldstexclr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldstexclr_unpriv.rs b/aarchmrs-instructions/src/A64/ldst/ldstexclr_unpriv.rs index 8047b90..ef0f28c 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldstexclr_unpriv.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldstexclr_unpriv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldstnapair_offs.rs b/aarchmrs-instructions/src/A64/ldst/ldstnapair_offs.rs index 57793ae..8cb857d 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldstnapair_offs.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldstnapair_offs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldstord.rs b/aarchmrs-instructions/src/A64/ldst/ldstord.rs index 23edb7c..27046a6 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldstord.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldstord.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldstpair_off.rs b/aarchmrs-instructions/src/A64/ldst/ldstpair_off.rs index c5b354d..87d8c58 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldstpair_off.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldstpair_off.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldstpair_post.rs b/aarchmrs-instructions/src/A64/ldst/ldstpair_post.rs index 53347db..f5a7a05 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldstpair_post.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldstpair_post.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldstpair_pre.rs b/aarchmrs-instructions/src/A64/ldst/ldstpair_pre.rs index 94d25f3..6dfa861 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldstpair_pre.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldstpair_pre.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/ldsttags.rs b/aarchmrs-instructions/src/A64/ldst/ldsttags.rs index 3a41cd3..05b5d41 100644 --- a/aarchmrs-instructions/src/A64/ldst/ldsttags.rs +++ b/aarchmrs-instructions/src/A64/ldst/ldsttags.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/loadlit.rs b/aarchmrs-instructions/src/A64/ldst/loadlit.rs index 8ada034..4814e6e 100644 --- a/aarchmrs-instructions/src/A64/ldst/loadlit.rs +++ b/aarchmrs-instructions/src/A64/ldst/loadlit.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/memcms.rs b/aarchmrs-instructions/src/A64/ldst/memcms.rs index faf04d7..fbd1f22 100644 --- a/aarchmrs-instructions/src/A64/ldst/memcms.rs +++ b/aarchmrs-instructions/src/A64/ldst/memcms.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/memop.rs b/aarchmrs-instructions/src/A64/ldst/memop.rs index 9801e36..d2d9d1c 100644 --- a/aarchmrs-instructions/src/A64/ldst/memop.rs +++ b/aarchmrs-instructions/src/A64/ldst/memop.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/memop_128.rs b/aarchmrs-instructions/src/A64/ldst/memop_128.rs index 1b491a4..045efcd 100644 --- a/aarchmrs-instructions/src/A64/ldst/memop_128.rs +++ b/aarchmrs-instructions/src/A64/ldst/memop_128.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/memop_unpriv.rs b/aarchmrs-instructions/src/A64/ldst/memop_unpriv.rs index 550b33c..fe749c8 100644 --- a/aarchmrs-instructions/src/A64/ldst/memop_unpriv.rs +++ b/aarchmrs-instructions/src/A64/ldst/memop_unpriv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/memset_go.rs b/aarchmrs-instructions/src/A64/ldst/memset_go.rs index ed4996e..0621e8b 100644 --- a/aarchmrs-instructions/src/A64/ldst/memset_go.rs +++ b/aarchmrs-instructions/src/A64/ldst/memset_go.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/rcwcomswap.rs b/aarchmrs-instructions/src/A64/ldst/rcwcomswap.rs index 0c6bd59..6ea68b4 100644 --- a/aarchmrs-instructions/src/A64/ldst/rcwcomswap.rs +++ b/aarchmrs-instructions/src/A64/ldst/rcwcomswap.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/ldst/rcwcomswappr.rs b/aarchmrs-instructions/src/A64/ldst/rcwcomswappr.rs index b59ca06..6f3cbe2 100644 --- a/aarchmrs-instructions/src/A64/ldst/rcwcomswappr.rs +++ b/aarchmrs-instructions/src/A64/ldst/rcwcomswappr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/reserved.rs b/aarchmrs-instructions/src/A64/reserved.rs index c135aff..414a474 100644 --- a/aarchmrs-instructions/src/A64/reserved.rs +++ b/aarchmrs-instructions/src/A64/reserved.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/reserved/perm_undef.rs b/aarchmrs-instructions/src/A64/reserved/perm_undef.rs index 91d0536..421e5b8 100644 --- a/aarchmrs-instructions/src/A64/reserved/perm_undef.rs +++ b/aarchmrs-instructions/src/A64/reserved/perm_undef.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp.rs b/aarchmrs-instructions/src/A64/simd_dp.rs index a5eb57c..152f4d3 100644 --- a/aarchmrs-instructions/src/A64/simd_dp.rs +++ b/aarchmrs-instructions/src/A64/simd_dp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdall.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdall.rs index 95ae32e..537b97c 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdall.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdall.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimddiff.rs b/aarchmrs-instructions/src/A64/simd_dp/asimddiff.rs index ed4d5fd..1e8adcb 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimddiff.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimddiff.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdelem.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdelem.rs index 6f6c625..c209077 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdelem.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdelem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdext.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdext.rs index 481284a..112ae23 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdext.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdimm.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdimm.rs index edd4c92..d2bab8c 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdimm.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdins.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdins.rs index a41a922..e95515a 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdins.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdins.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdmisc.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdmisc.rs index de360d0..0ccfbfd 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdmisc.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdmisc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdmiscfp16.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdmiscfp16.rs index 099d9f8..55b546d 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdmiscfp16.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdmiscfp16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdperm.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdperm.rs index 89e5d55..bdde9f0 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdperm.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdperm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdsame.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdsame.rs index ec06c61..93743ac 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdsame.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdsame.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdsame2.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdsame2.rs index 5a5fd42..2969c09 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdsame2.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdsame2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdsamefp16.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdsamefp16.rs index a1d2f52..785c153 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdsamefp16.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdsamefp16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdshf.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdshf.rs index dceb4ff..4f7d194 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdshf.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdshf.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asimdtbl.rs b/aarchmrs-instructions/src/A64/simd_dp/asimdtbl.rs index e7a5e62..9011d90 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asimdtbl.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asimdtbl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisddiff.rs b/aarchmrs-instructions/src/A64/simd_dp/asisddiff.rs index 07ac1c0..df94350 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisddiff.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisddiff.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisdelem.rs b/aarchmrs-instructions/src/A64/simd_dp/asisdelem.rs index 4aac872..963623c 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisdelem.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisdelem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisdmisc.rs b/aarchmrs-instructions/src/A64/simd_dp/asisdmisc.rs index 04f3dd7..7b76ead 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisdmisc.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisdmisc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisdmiscfp16.rs b/aarchmrs-instructions/src/A64/simd_dp/asisdmiscfp16.rs index 5e68ce3..56e13d9 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisdmiscfp16.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisdmiscfp16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisdone.rs b/aarchmrs-instructions/src/A64/simd_dp/asisdone.rs index 26245c0..fb39400 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisdone.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisdone.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisdpair.rs b/aarchmrs-instructions/src/A64/simd_dp/asisdpair.rs index 4dc688a..b72ff8f 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisdpair.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisdpair.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisdsame.rs b/aarchmrs-instructions/src/A64/simd_dp/asisdsame.rs index cf1ed42..37bd193 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisdsame.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisdsame.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisdsame2.rs b/aarchmrs-instructions/src/A64/simd_dp/asisdsame2.rs index 92e1c43..e198340 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisdsame2.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisdsame2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisdsamefp16.rs b/aarchmrs-instructions/src/A64/simd_dp/asisdsamefp16.rs index eb58268..5acf69a 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisdsamefp16.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisdsamefp16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/asisdshf.rs b/aarchmrs-instructions/src/A64/simd_dp/asisdshf.rs index d0059cb..8f779bd 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/asisdshf.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/asisdshf.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/crypto3_imm2.rs b/aarchmrs-instructions/src/A64/simd_dp/crypto3_imm2.rs index 7dca48e..b129ba2 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/crypto3_imm2.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/crypto3_imm2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/crypto3_imm6.rs b/aarchmrs-instructions/src/A64/simd_dp/crypto3_imm6.rs index 682c5c9..46786b2 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/crypto3_imm6.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/crypto3_imm6.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/crypto4.rs b/aarchmrs-instructions/src/A64/simd_dp/crypto4.rs index 7877844..c58e286 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/crypto4.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/crypto4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/cryptoaes.rs b/aarchmrs-instructions/src/A64/simd_dp/cryptoaes.rs index 24ad71c..9f67b90 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/cryptoaes.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/cryptoaes.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/cryptosha2.rs b/aarchmrs-instructions/src/A64/simd_dp/cryptosha2.rs index f9d62c1..2ddb1d4 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/cryptosha2.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/cryptosha2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/cryptosha3.rs b/aarchmrs-instructions/src/A64/simd_dp/cryptosha3.rs index c689216..77d18e0 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/cryptosha3.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/cryptosha3.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/cryptosha512_2.rs b/aarchmrs-instructions/src/A64/simd_dp/cryptosha512_2.rs index e13cab5..2473498 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/cryptosha512_2.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/cryptosha512_2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/cryptosha512_3.rs b/aarchmrs-instructions/src/A64/simd_dp/cryptosha512_3.rs index ec45ac6..641da1e 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/cryptosha512_3.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/cryptosha512_3.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/float2fix.rs b/aarchmrs-instructions/src/A64/simd_dp/float2fix.rs index 26489a1..65cd23b 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/float2fix.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/float2fix.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/float2int.rs b/aarchmrs-instructions/src/A64/simd_dp/float2int.rs index e296a78..ef8f4ca 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/float2int.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/float2int.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/floatccmp.rs b/aarchmrs-instructions/src/A64/simd_dp/floatccmp.rs index 164f4a2..f90bc19 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/floatccmp.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/floatccmp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/floatcmp.rs b/aarchmrs-instructions/src/A64/simd_dp/floatcmp.rs index d3e0f72..9d01f31 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/floatcmp.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/floatcmp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/floatdp1.rs b/aarchmrs-instructions/src/A64/simd_dp/floatdp1.rs index 0057699..8f64bca 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/floatdp1.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/floatdp1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/floatdp2.rs b/aarchmrs-instructions/src/A64/simd_dp/floatdp2.rs index 20c1067..7357bc7 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/floatdp2.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/floatdp2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/floatdp3.rs b/aarchmrs-instructions/src/A64/simd_dp/floatdp3.rs index 8614cf9..5011189 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/floatdp3.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/floatdp3.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/floatimm.rs b/aarchmrs-instructions/src/A64/simd_dp/floatimm.rs index 062df62..86e6634 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/floatimm.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/floatimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/simd_dp/floatsel.rs b/aarchmrs-instructions/src/A64/simd_dp/floatsel.rs index 1ff22b7..b45777d 100644 --- a/aarchmrs-instructions/src/A64/simd_dp/floatsel.rs +++ b/aarchmrs-instructions/src/A64/simd_dp/floatsel.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme.rs b/aarchmrs-instructions/src/A64/sme.rs index 7657cf4..dae9a8d 100644 --- a/aarchmrs-instructions/src/A64/sme.rs +++ b/aarchmrs-instructions/src/A64/sme.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4.rs index 7c5f60f..d21a427 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4/mortlach_f64f64_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4/mortlach_f64f64_prod4.rs index 4a72c9c..8bc4360 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4/mortlach_f64f64_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4/mortlach_f64f64_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4/mortlach_i16i64_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4/mortlach_i16i64_prod4.rs index cb61b7c..3996e2b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4/mortlach_i16i64_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_64bit_prod4/mortlach_i16i64_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod.rs index 1f2f546..fbc0234 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_b16b16_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_b16b16_prod.rs index fccf4fc..688be7f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_b16b16_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_b16b16_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_bini32_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_bini32_prod.rs index 7c0f5b5..5f43b63 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_bini32_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_bini32_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_f16f16_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_f16f16_prod.rs index 34a4383..b5407c0 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_f16f16_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_f16f16_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_f8f16_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_f8f16_prod.rs index 6a3ff99..312cd41 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_f8f16_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_misc_prod/mortlach_f8f16_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4.rs index 9a34207..cd3033c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_b16b16_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_b16b16_prod4.rs index 5c4910c..cc86ea6 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_b16b16_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_b16b16_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_b16f32_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_b16f32_prod4.rs index 7dc5ed3..b075149 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_b16f32_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_b16f32_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f16f16_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f16f16_prod4.rs index b497adb..92e0f1b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f16f16_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f16f16_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f16f32_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f16f32_prod4.rs index 258051b..42ec208 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f16f32_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f16f32_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f32f32_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f32f32_prod4.rs index 91689a8..6b4df42 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f32f32_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f32f32_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f8f16_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f8f16_prod4.rs index 8c697ed..e5e931e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f8f16_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f8f16_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f8f32_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f8f32_prod4.rs index 3713526..b127b8c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f8f32_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_f8f32_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_i16i32_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_i16i32_prod4.rs index 3061a9b..7a0c85d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_i16i32_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_i16i32_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_i8i32_prod4.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_i8i32_prod4.rs index 8722fdb..929aed2 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_i8i32_prod4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_prod4/mortlach_i8i32_prod4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod.rs index 16f984f..7655b0e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_b16b16_1in2ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_b16b16_1in2ss_prod.rs index 0e101ea..5be7951 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_b16b16_1in2ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_b16b16_1in2ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_b16f32_2in4ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_b16f32_2in4ss_prod.rs index cd81d21..52d846e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_b16f32_2in4ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_b16f32_2in4ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f16f16_1in2ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f16f16_1in2ss_prod.rs index 0f6af89..43ff1f0 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f16f16_1in2ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f16f16_1in2ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f16f32_2in4ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f16f32_2in4ss_prod.rs index b84a1b4..ff63a2d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f16f32_2in4ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f16f32_2in4ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f32f32_1in2ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f32f32_1in2ss_prod.rs index 669e614..a027477 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f32f32_1in2ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f32f32_1in2ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f8f16_2in4ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f8f16_2in4ss_prod.rs index 12e833e..423d9a2 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f8f16_2in4ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f8f16_2in4ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f8f32_2in4ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f8f32_2in4ss_prod.rs index b44eba4..1297fb5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f8f32_2in4ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_f8f32_2in4ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_i16i32_2in4ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_i16i32_2in4ss_prod.rs index bdfe995..b98df56 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_i16i32_2in4ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_i16i32_2in4ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_i8i32_2in4ss_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_i8i32_2in4ss_prod.rs index f0b509e..0acd8d7 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_i8i32_2in4ss_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach2_ss_prod/mortlach_i8i32_2in4ss_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod.rs index 2d93383..2537b0a 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_b16f32_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_b16f32_prod.rs index c4e9d0d..fc4b5ad 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_b16f32_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_b16f32_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f16f32_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f16f32_prod.rs index 81e0a10..abb52e2 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f16f32_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f16f32_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f32f32_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f32f32_prod.rs index 435fdb0..5a26c97 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f32f32_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f32f32_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f8f32_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f8f32_prod.rs index 3b1c82b..612f453 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f8f32_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_fp_prod/mortlach_f8f32_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod.rs index dfb2a2b..9b6c3f5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod/mortlach_i16i32_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod/mortlach_i16i32_prod.rs index 2f38b3d..b69ed22 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod/mortlach_i16i32_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod/mortlach_i16i32_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod/mortlach_i8i32_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod/mortlach_i8i32_prod.rs index 06bd692..f3e8e98 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod/mortlach_i8i32_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_32bit_int_prod/mortlach_i8i32_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod.rs index 83ce1f7..49aafea 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod/mortlach_f64f64_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod/mortlach_f64f64_prod.rs index c9f92ba..329a745 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod/mortlach_f64f64_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod/mortlach_f64f64_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod/mortlach_i16i64_prod.rs b/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod/mortlach_i16i64_prod.rs index a65eb25..3b7d3c3 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod/mortlach_i16i64_prod.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_64bit_prod/mortlach_i16i64_prod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext.rs index f9e9cba..50a75b9 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_extract_pred.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_extract_pred.rs index 6e64fff..d88d107 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_extract_pred.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_extract_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_extract_zero.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_extract_zero.rs index 0833f6e..299d0ba 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_extract_zero.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_extract_zero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_extract_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_extract_ctg.rs index aaaf217..6a96489 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_extract_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_extract_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_extract_zero.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_extract_zero.rs index 29f4956..1f07988 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_extract_zero.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_extract_zero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_za_extract_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_za_extract_ctg.rs index 3cba11d..2be5324 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_za_extract_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_za_extract_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_za_extract_zero.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_za_extract_zero.rs index f3b538a..3633b54 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_za_extract_zero.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi2_za_extract_zero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_extract_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_extract_ctg.rs index 06bd54f..a4f4c61 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_extract_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_extract_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_extract_zero.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_extract_zero.rs index 54b0820..cb30ce1 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_extract_zero.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_extract_zero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_za_extract_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_za_extract_ctg.rs index 66c6d58..62b542c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_za_extract_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_za_extract_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_za_extract_zero.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_za_extract_zero.rs index f10527d..a1622e1 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_za_extract_zero.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ext/mortlach_multi4_za_extract_zero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_hvadd.rs b/aarchmrs-instructions/src/A64/sme/mortlach_hvadd.rs index 6efb6b2..96107aa 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_hvadd.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_hvadd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_hvadd/mortlach_addhv.rs b/aarchmrs-instructions/src/A64/sme/mortlach_hvadd/mortlach_addhv.rs index fbbff15..dfb9f55 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_hvadd/mortlach_addhv.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_hvadd/mortlach_addhv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ins.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ins.rs index 6978883..9118afc 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ins.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ins.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_insert_pred.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_insert_pred.rs index 05a5bf1..aa12e8f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_insert_pred.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_insert_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi2_insert_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi2_insert_ctg.rs index 35ba6cb..bfeb693 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi2_insert_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi2_insert_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi2_za_insert_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi2_za_insert_ctg.rs index 48a5f0a..2c78e6f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi2_za_insert_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi2_za_insert_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi4_insert_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi4_insert_ctg.rs index 1aaae3a..50f0caa 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi4_insert_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi4_insert_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi4_za_insert_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi4_za_insert_ctg.rs index 404658b..a0af7a4 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi4_za_insert_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_ins/mortlach_multi4_za_insert_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mem.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mem.rs index 6e9615f..d02d910 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mem.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_load.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_load.rs index e0bc5a7..66f5d74 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_load.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_load.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_qload.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_qload.rs index 50996a2..9aeea0c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_qload.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_qload.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_qstore.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_qstore.rs index d11be35..730c934 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_qstore.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_qstore.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_store.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_store.rs index b32d9bc..c56710b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_store.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_contig_store.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_ctxt_ldst.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_ctxt_ldst.rs index 72010d6..774a7d9 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_ctxt_ldst.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_ctxt_ldst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_zt_ldst.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_zt_ldst.rs index b8470a6..59f85f9 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_zt_ldst.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mem/mortlach_zt_ldst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt.rs index 292d60a..eeca6d7 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_extract_zt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_extract_zt.rs index 3621f4b..dfb9570 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_extract_zt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_extract_zt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_insert_zt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_insert_zt.rs index bcf9028..81ea31c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_insert_zt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_insert_zt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_move_to_zt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_move_to_zt.rs index a1f4e27..9db40d9 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_move_to_zt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_mov_zt/mortlach_move_to_zt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a.rs index bb8a1fe..3ae9436 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_fma_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_fma_long_sm.rs index 2802bdc..e2ac44c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_fma_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_fma_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_mla_long_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_mla_long_long_sm.rs index 9722488..374d11a 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_mla_long_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_mla_long_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_mla_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_mla_long_sm.rs index 961ec91..b3beff8 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_mla_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi1_zz_za_mla_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_2way_dot_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_2way_dot_sm.rs index afb77ec..d5dfc17 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_2way_dot_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_2way_dot_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_4way_dot_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_4way_dot_sm.rs index 1a765ba..3aa4a72 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_4way_dot_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_4way_dot_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_fpdot_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_fpdot_sm.rs index a9bf1f5..ec1576a 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_fpdot_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_fpdot_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_mixed_dot_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_mixed_dot_sm.rs index 2938f82..0bd5758 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_mixed_dot_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_z_za_mixed_dot_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_f16_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_f16_sm.rs index b7dc844..5bd6251 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_f16_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_f16_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_float_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_float_sm.rs index aa6d0e7..05b7b36 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_float_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_float_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_fma_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_fma_long_sm.rs index e9a7bef..7de4847 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_fma_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_fma_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_fp8_fma_long_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_fp8_fma_long_long_sm.rs index 2178b4a..5bd9900 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_fp8_fma_long_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_fp8_fma_long_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_int_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_int_sm.rs index 0182688..b30d74d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_int_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_int_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_mla_long_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_mla_long_long_sm.rs index 4fd7626..ccd3191 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_mla_long_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_mla_long_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_mla_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_mla_long_sm.rs index 6bd90da..be851b7 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_mla_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1a/mortlach_multi2_zz_za_mla_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b.rs index dd47c5a..8c08c85 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi1_zz_za_fp8_fma_long_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi1_zz_za_fp8_fma_long_long_sm.rs index 3bb4e22..b9c3e29 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi1_zz_za_fp8_fma_long_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi1_zz_za_fp8_fma_long_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi1_zz_za_fp8_fma_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi1_zz_za_fp8_fma_long_sm.rs index 749a0a8..bb8370a 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi1_zz_za_fp8_fma_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi1_zz_za_fp8_fma_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_2way_dot_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_2way_dot_sm.rs index 4f8dfe8..982ce51 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_2way_dot_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_2way_dot_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_4way_dot_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_4way_dot_sm.rs index 134ada9..458801e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_4way_dot_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_4way_dot_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_fpdot_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_fpdot_sm.rs index 7150313..fb93197 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_fpdot_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_fpdot_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_mixed_dot_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_mixed_dot_sm.rs index 9d6c0d6..5154ece 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_mixed_dot_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_z_za_mixed_dot_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_f16_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_f16_sm.rs index 677f57b..1ff7f5c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_f16_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_f16_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_float_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_float_sm.rs index f2da053..7aefad5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_float_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_float_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_fma_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_fma_long_sm.rs index 01fc337..c3ea93b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_fma_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_fma_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_fp8_fma_long_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_fp8_fma_long_long_sm.rs index f5d3fe1..3eecbea 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_fp8_fma_long_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_fp8_fma_long_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_int_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_int_sm.rs index 372ab0d..1aee613 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_int_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_int_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_mla_long_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_mla_long_long_sm.rs index 9fee833..88942f5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_mla_long_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_mla_long_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_mla_long_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_mla_long_sm.rs index 38672db..3154069 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_mla_long_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_1b/mortlach_multi4_zz_za_mla_long_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a.rs index 4438565..0bb8b47 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_2way_dot_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_2way_dot_mm.rs index 82787c5..0777af7 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_2way_dot_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_2way_dot_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_4way_dot_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_4way_dot_mm.rs index c40bdd1..bf8fd4f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_4way_dot_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_4way_dot_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_f16_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_f16_mm.rs index a627420..6ef45e3 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_f16_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_f16_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_float_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_float_mm.rs index ad3a49a..53c672c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_float_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_float_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_fpdot_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_fpdot_mm.rs index 1dcf40e..b8316bf 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_fpdot_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_fpdot_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_int_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_int_mm.rs index 101bc2b..822063a 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_int_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_int_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_mixed_dot_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_mixed_dot_mm.rs index c7e8822..32a679f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_mixed_dot_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_z_za_mixed_dot_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_f16_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_f16_mm.rs index 20e425a..88f8a19 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_f16_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_f16_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_float_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_float_mm.rs index b428bb6..80a55ff 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_float_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_float_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fma_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fma_long_mm.rs index 79f2bc8..5b3a31c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fma_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fma_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fp8_fma_long_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fp8_fma_long_long_mm.rs index 066bf35..a143dae 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fp8_fma_long_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fp8_fma_long_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fp8_fma_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fp8_fma_long_mm.rs index 901b3f6..e2f45f3 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fp8_fma_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_fp8_fma_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_int_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_int_mm.rs index 301eef7..7f3d394 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_int_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_int_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_mla_long_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_mla_long_long_mm.rs index bbcd12f..0f1508d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_mla_long_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_mla_long_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_mla_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_mla_long_mm.rs index b50eee7..cdafc4e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_mla_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2a/mortlach_multi2_zz_za_mla_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b.rs index 488a722..0fd1e58 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_2way_dot_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_2way_dot_mm.rs index 506afef..d6791f5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_2way_dot_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_2way_dot_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_4way_dot_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_4way_dot_mm.rs index 907a093..8ae8d9f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_4way_dot_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_4way_dot_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_f16_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_f16_mm.rs index 801e87e..834d8fc 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_f16_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_f16_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_float_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_float_mm.rs index 403efbf..ceef676 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_float_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_float_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_fpdot_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_fpdot_mm.rs index 8ecec73..4f4258d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_fpdot_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_fpdot_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_int_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_int_mm.rs index 2e8c3f1..47711c5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_int_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_int_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_mixed_dot_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_mixed_dot_mm.rs index 67e75a6..fbe16d0 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_mixed_dot_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_z_za_mixed_dot_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_f16_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_f16_mm.rs index 1bb78ec..c316d64 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_f16_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_f16_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_float_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_float_mm.rs index a1facae..bad9bc7 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_float_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_float_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fma_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fma_long_mm.rs index aa7c6a1..1a7da7a 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fma_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fma_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fp8_fma_long_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fp8_fma_long_long_mm.rs index f7f3ebc..d70551e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fp8_fma_long_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fp8_fma_long_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fp8_fma_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fp8_fma_long_mm.rs index 3d2a71c..f1d0e67 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fp8_fma_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_fp8_fma_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_int_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_int_mm.rs index 54c405f..355c052 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_int_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_int_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_mla_long_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_mla_long_long_mm.rs index 2c35600..c34c904 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_mla_long_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_mla_long_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_mla_long_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_mla_long_mm.rs index 777e10e..24be0ae 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_mla_long_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_array_2b/mortlach_multi4_zz_za_mla_long_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1.rs index cbf77dc..87514e8 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fma_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fma_long_idx.rs index 421072c..0134edd 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fma_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fma_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fp8_fma_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fp8_fma_long_idx.rs index 9e2761f..16a17ad 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fp8_fma_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fp8_fma_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fp8_fma_long_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fp8_fma_long_long_idx.rs index 8dc80ee..4d8a9da 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fp8_fma_long_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_fp8_fma_long_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_idx.rs index 3fc27b7..1c3c885 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_long_idx_d.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_long_idx_d.rs index 9a4e2d9..360af76 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_long_idx_d.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_long_idx_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_long_idx_s.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_long_idx_s.rs index 65bd747..9d4ea8f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_long_idx_s.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_1/mortlach_multi1_mla_long_long_idx_s.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2.rs index 33d7b45..cc72401 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fma_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fma_long_idx.rs index c090038..3df40f6 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fma_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fma_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fdot_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fdot_idx.rs index 3ed2090..dd9d35e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fdot_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fdot_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fma_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fma_long_idx.rs index 93d8624..bb1fcdf 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fma_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fma_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fma_long_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fma_long_long_idx.rs index 0ecd751..12207f3 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fma_long_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fma_long_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fvdot_idx_s.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fvdot_idx_s.rs index 1d20b2d..131784f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fvdot_idx_s.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_fp8_fvdot_idx_s.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_idx.rs index c99402a..61bb02e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_long_idx_d.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_long_idx_d.rs index dcdb571..4e57c25 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_long_idx_d.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_long_idx_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_long_idx_s.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_long_idx_s.rs index 4c65729..af22dc0 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_long_idx_s.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_mla_long_long_idx_s.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_d.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_d.rs index 40c1452..a15916b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_d.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_h.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_h.rs index 7f95129..4f83b12 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_h.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_h.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_s.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_s.rs index c731a0c..1c4bd77 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_s.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_2/mortlach_multi2_zza_idx_s.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3.rs index d8c29ac..e778407 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fma_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fma_long_idx.rs index 19a8241..aaed9a9 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fma_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fma_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fdot_idx_h.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fdot_idx_h.rs index 72a1c3e..c18d2a1 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fdot_idx_h.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fdot_idx_h.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fma_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fma_long_idx.rs index 1aa6cb4..b7e25ac 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fma_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fma_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fma_long_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fma_long_long_idx.rs index 84b59fb..b67136e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fma_long_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_fp8_fma_long_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_idx.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_idx.rs index 984e568..c3993a6 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_idx.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_idx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_long_idx_d.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_long_idx_d.rs index c1e457b..aad67a5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_long_idx_d.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_long_idx_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_long_idx_s.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_long_idx_s.rs index bd8c910..0d75190 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_long_idx_s.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_mla_long_long_idx_s.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_d.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_d.rs index b4f787c..cb27aa9 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_d.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_h.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_h.rs index 2338adc..5baeedf 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_h.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_h.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_s.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_s.rs index c5d3c9c..e18e2c8 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_s.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_indexed_3/mortlach_multi4_zza_idx_s.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg.rs index d738662..aa4f865 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cld_cldnt_si_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cld_cldnt_si_ctg.rs index ed351ad..a07ec34 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cld_cldnt_si_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cld_cldnt_si_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cld_cldnt_ss_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cld_cldnt_ss_ctg.rs index 1a4bc54..7b8b0b7 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cld_cldnt_ss_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cld_cldnt_ss_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cst_cstnt_si_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cst_cstnt_si_ctg.rs index fa4adee..442c48a 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cst_cstnt_si_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cst_cstnt_si_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cst_cstnt_ss_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cst_cstnt_ss_ctg.rs index 09d51c7..59677b6 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cst_cstnt_ss_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi2_cst_cstnt_ss_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cld_cldnt_si_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cld_cldnt_si_ctg.rs index a39fbf8..ef49d21 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cld_cldnt_si_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cld_cldnt_si_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cld_cldnt_ss_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cld_cldnt_ss_ctg.rs index 162d5db..036e91f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cld_cldnt_ss_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cld_cldnt_ss_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cst_cstnt_si_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cst_cstnt_si_ctg.rs index 0408db5..d78d385 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cst_cstnt_si_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cst_cstnt_si_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cst_cstnt_ss_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cst_cstnt_ss_ctg.rs index 4199aba..ac1dbae 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cst_cstnt_ss_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_ctg/mortlach_multi4_cst_cstnt_ss_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg.rs index b6c4ec0..4cd950c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cld_cldnt_si_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cld_cldnt_si_nctg.rs index d4ca7d0..b50c093 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cld_cldnt_si_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cld_cldnt_si_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cld_cldnt_ss_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cld_cldnt_ss_nctg.rs index 095eb90..358aa23 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cld_cldnt_ss_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cld_cldnt_ss_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cst_cstnt_si_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cst_cstnt_si_nctg.rs index 34d2e62..a9c29c3 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cst_cstnt_si_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cst_cstnt_si_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cst_cstnt_ss_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cst_cstnt_ss_nctg.rs index ff0fb1d..c0ed3c9 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cst_cstnt_ss_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi2_cst_cstnt_ss_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cld_cldnt_si_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cld_cldnt_si_nctg.rs index 89d2eee..18b649d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cld_cldnt_si_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cld_cldnt_si_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cld_cldnt_ss_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cld_cldnt_ss_nctg.rs index f55c0fe..51398a3 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cld_cldnt_ss_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cld_cldnt_ss_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cst_cstnt_si_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cst_cstnt_si_nctg.rs index 2e2629b..bde27ba 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cst_cstnt_si_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cst_cstnt_si_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cst_cstnt_ss_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cst_cstnt_ss_nctg.rs index 473cb71..a9d57d0 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cst_cstnt_ss_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_mem_nctg/mortlach_multi4_cst_cstnt_ss_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1.rs index 30aefb3..8c11f56 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1/mortlach_multi2_select_int.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1/mortlach_multi2_select_int.rs index a020f7b..ed8e333 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1/mortlach_multi2_select_int.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1/mortlach_multi2_select_int.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1/mortlach_multi4_select_int.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1/mortlach_multi4_select_int.rs index 36b39a6..79d9842 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1/mortlach_multi4_select_int.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_1/mortlach_multi4_select_int.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a.rs index cb9cd2c..99687c0 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_add_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_add_sm.rs index 124e157..ba11d0f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_add_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_add_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_fminmax_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_fminmax_sm.rs index 1ec6d8d..a4b928a 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_fminmax_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_fminmax_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_fscale_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_fscale_sm.rs index c988bc6..2e85475 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_fscale_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_fscale_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_minmax_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_minmax_sm.rs index 688948e..31e5b5f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_minmax_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_minmax_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_shift_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_shift_sm.rs index ac1315e..b0d83b5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_shift_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_shift_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_sqdmulh_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_sqdmulh_sm.rs index 2d341bf..6d15e8a 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_sqdmulh_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2a/mortlach_multi2_z_z_sqdmulh_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b.rs index a5ec5d4..f7edca1 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_add_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_add_sm.rs index 210b88e..0d3b9ce 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_add_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_add_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_fminmax_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_fminmax_sm.rs index 6e18438..5ea88cd 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_fminmax_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_fminmax_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_fscale_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_fscale_sm.rs index 04c0751..907e9e7 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_fscale_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_fscale_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_minmax_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_minmax_sm.rs index 515e08b..2151186 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_minmax_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_minmax_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_shift_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_shift_sm.rs index 84e320b..3aa8d45 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_shift_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_shift_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_sqdmulh_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_sqdmulh_sm.rs index e5b8c68..b2d6423 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_sqdmulh_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2b/mortlach_multi4_z_z_sqdmulh_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0.rs index b11d83d..d39ad54 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_fminmax_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_fminmax_mm.rs index dbd6ac7..ebd8d54 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_fminmax_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_fminmax_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_fscale_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_fscale_mm.rs index 340079a..111098f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_fscale_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_fscale_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_minmax_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_minmax_mm.rs index adacf64..b996a30 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_minmax_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_minmax_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_shift_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_shift_mm.rs index e6e3aa4..861ba07 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_shift_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c0/mortlach_multi2_z_z_shift_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c1.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c1.rs index f3b3f8f..9ad6ac8 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c1.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c1/mortlach_multi2_z_z_sqdmulh_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c1/mortlach_multi2_z_z_sqdmulh_mm.rs index 81e375c..0c8396b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c1/mortlach_multi2_z_z_sqdmulh_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2c1/mortlach_multi2_z_z_sqdmulh_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0.rs index 1329f9e..0afcccd 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_fminmax_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_fminmax_mm.rs index 4e493d6..c8fb916 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_fminmax_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_fminmax_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_fscale_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_fscale_mm.rs index b14aefb..3856d00 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_fscale_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_fscale_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_minmax_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_minmax_mm.rs index efcd0d2..82defb0 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_minmax_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_minmax_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_shift_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_shift_mm.rs index b93cd45..c9b2b42 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_shift_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d0/mortlach_multi4_z_z_shift_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d1.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d1.rs index fcd4279..34bb648 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d1.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d1/mortlach_multi4_z_z_sqdmulh_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d1/mortlach_multi4_z_z_sqdmulh_mm.rs index 8f35ad3..2acdcd8 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d1/mortlach_multi4_z_z_sqdmulh_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_2d1/mortlach_multi4_z_z_sqdmulh_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3.rs index e7cbfbd..acfe86b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_clamp_int.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_clamp_int.rs index 4fd78f0..b8b819f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_clamp_int.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_clamp_int.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_fclamp.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_fclamp.rs index ab9eecb..b6ea4ce 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_fclamp.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_fclamp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_qrshr.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_qrshr.rs index 0bc44a5..250f994 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_qrshr.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_qrshr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_z_z_long_zip.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_z_z_long_zip.rs index 87cedbf..9ce772e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_z_z_long_zip.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_z_z_long_zip.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_z_z_zip.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_z_z_zip.rs index 1baba1b..de383a1 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_z_z_zip.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi2_z_z_zip.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_clamp_int.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_clamp_int.rs index 15bd9a4..cfd181e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_clamp_int.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_clamp_int.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_fclamp.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_fclamp.rs index e8aa42e..7f15a1c 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_fclamp.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_fclamp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_qrshr.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_qrshr.rs index 5cdf1e4..4db30cf 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_qrshr.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_3/mortlach_multi4_qrshr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4.rs index 4f35296..d9b1fe0 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_fpint_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_fpint_cvrt.rs index 617b4a2..5fa494d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_fpint_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_fpint_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_frint.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_frint.rs index c26dfb9..8f5f9d3 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_frint.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_frint.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_intfp_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_intfp_cvrt.rs index 6e0bf41..55ddf0b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_intfp_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_intfp_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_fp8_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_fp8_cvrt.rs index e7c9e59..18bd64f 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_fp8_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_fp8_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_fp_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_fp_cvrt.rs index d8b36d1..4831bef 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_fp_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_fp_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_int_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_int_cvrt.rs index 03e9a20..c8e4d6d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_int_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_narrow_int_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_fp8_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_fp8_cvrt.rs index 0508d27..e2570cc 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_fp8_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_fp8_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_fp_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_fp_cvrt.rs index 43236e7..0b248e6 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_fp_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_fp_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_int.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_int.rs index d9560a6..59cf3a0 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_int.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi2_wide_int.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_fpint_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_fpint_cvrt.rs index 537faeb..4938326 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_fpint_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_fpint_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_frint.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_frint.rs index 513a1f6..d7f17ee 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_frint.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_frint.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_intfp_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_intfp_cvrt.rs index d086f90..577d63b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_intfp_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_intfp_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_narrow_fp8_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_narrow_fp8_cvrt.rs index 81664bc..36baeac 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_narrow_fp8_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_narrow_fp8_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_narrow_int_cvrt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_narrow_int_cvrt.rs index a118ff8..9964670 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_narrow_int_cvrt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_narrow_int_cvrt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_wide_int.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_wide_int.rs index b1dc610..7bf7780 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_wide_int.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_wide_int.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_z_z_long_zip.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_z_z_long_zip.rs index ca3682d..d7551c5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_z_z_long_zip.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_z_z_long_zip.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_z_z_zip.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_z_z_zip.rs index ce0e8c6..85507bf 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_z_z_zip.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_4/mortlach_multi4_z_z_zip.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a.rs index ff4866a..9e0c5ee 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a/mortlach_multi2_fmul_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a/mortlach_multi2_fmul_mm.rs index dcae682..795cb89 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a/mortlach_multi2_fmul_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a/mortlach_multi2_fmul_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a/mortlach_multi4_fmul_mm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a/mortlach_multi4_fmul_mm.rs index 90d29c6..0eb4503 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a/mortlach_multi4_fmul_mm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5a/mortlach_multi4_fmul_mm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b.rs index 4c84229..81f1d06 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b/mortlach_multi2_fmul_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b/mortlach_multi2_fmul_sm.rs index 9c069bd..e2b13d2 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b/mortlach_multi2_fmul_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b/mortlach_multi2_fmul_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b/mortlach_multi4_fmul_sm.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b/mortlach_multi4_fmul_sm.rs index 917bb38..65f6e50 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b/mortlach_multi4_fmul_sm.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_5b/mortlach_multi4_fmul_sm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6.rs index 64580fd..5283fd1 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6/mortlach_multi4_lut6_16_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6/mortlach_multi4_lut6_16_ctg.rs index 26a3583..815211d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6/mortlach_multi4_lut6_16_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6/mortlach_multi4_lut6_16_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6/mortlach_multi4_lut6_16_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6/mortlach_multi4_lut6_16_nctg.rs index 1a0bd33..e238209 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6/mortlach_multi4_lut6_16_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multi_sve_6/mortlach_multi4_lut6_16_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multizero.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multizero.rs index 1e26887..656dc84 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multizero.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multizero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_multizero/mortlach_multi_zero.rs b/aarchmrs-instructions/src/A64/sme/mortlach_multizero/mortlach_multi_zero.rs index 5434349..a000e59 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_multizero/mortlach_multi_zero.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_multizero/mortlach_multi_zero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zero.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zero.rs index 66b5227..0ff988e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zero.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zero/mortlach_zero.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zero/mortlach_zero.rs index 305c629..3dc289e 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zero/mortlach_zero.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zero/mortlach_zero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zero_zt.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zero_zt.rs index f80e158..f068ed5 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zero_zt.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zero_zt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg.rs index 7811f59..bab59c6 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_1dst.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_1dst.rs index 6805257..fc99341 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_1dst.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_1dst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_2dst_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_2dst_ctg.rs index 0a0f611..e814eba 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_2dst_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_2dst_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst2src_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst2src_ctg.rs index 697fde7..af3ad4d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst2src_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst2src_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst3src_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst3src_ctg.rs index 1ca7cdb..b1f1dd3 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst3src_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst3src_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst_ctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst_ctg.rs index dd062dd..904022b 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst_ctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_ctg/mortlach_expand_4dst_ctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg.rs index 30d7e27..d54adb2 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_2dst_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_2dst_nctg.rs index 0aa2f2f..dd8c7e3 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_2dst_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_2dst_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst2src_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst2src_nctg.rs index 5e72a2c..d0ca48d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst2src_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst2src_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst3src_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst3src_nctg.rs index ec5cbb3..91ff53d 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst3src_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst3src_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst_nctg.rs b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst_nctg.rs index 6e123a7..dbc21ee 100644 --- a/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst_nctg.rs +++ b/aarchmrs-instructions/src/A64/sme/mortlach_zt_expand_nctg/mortlach_expand_4dst_nctg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve.rs b/aarchmrs-instructions/src/A64/sve.rs index 5757d41..ed304a0 100644 --- a/aarchmrs-instructions/src/A64/sve.rs +++ b/aarchmrs-instructions/src/A64/sve.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_abal.rs b/aarchmrs-instructions/src/A64/sve/sve_abal.rs index 4314e02..f761bf7 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_abal.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_abal.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_abal/sve_abal.rs b/aarchmrs-instructions/src/A64/sve/sve_abal/sve_abal.rs index 90ebffa..38cd07d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_abal/sve_abal.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_abal/sve_abal.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_alloca.rs b/aarchmrs-instructions/src/A64/sve/sve_alloca.rs index d291719..c8fe29b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_alloca.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_alloca.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_arith_svl.rs b/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_arith_svl.rs index 7781490..b782305 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_arith_svl.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_arith_svl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_arith_vl.rs b/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_arith_vl.rs index 99b5b0d..1a8398b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_arith_vl.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_arith_vl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_read_svl_a.rs b/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_read_svl_a.rs index ad0bf7a..ff1df42 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_read_svl_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_read_svl_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_read_vl_a.rs b/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_read_vl_a.rs index d62f747..d1218e2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_read_vl_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_alloca/sve_int_read_vl_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpgpr.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpgpr.rs index 95a7e9d..3193c1a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpgpr.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpgpr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_cterm.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_cterm.rs index 5bf96f2..7713c7d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_cterm.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_cterm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_while_rr.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_while_rr.rs index ced1c41..8265c7e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_while_rr.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_while_rr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_whilenc.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_whilenc.rs index c628eaa..65f33fd 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_whilenc.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpgpr/sve_int_whilenc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpsimm.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpsimm.rs index 04a2cd7..ba635eb 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpsimm.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpsimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpsimm/sve_int_scmp_vi.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpsimm/sve_int_scmp_vi.rs index 95e640a..23548b0 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpsimm/sve_int_scmp_vi.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpsimm/sve_int_scmp_vi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpuimm.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpuimm.rs index 873250c..c09ee00 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpuimm.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpuimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpuimm/sve_int_ucmp_vi.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpuimm/sve_int_ucmp_vi.rs index c07e6cd..a54d1bf 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpuimm/sve_int_ucmp_vi.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpuimm/sve_int_ucmp_vi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpvec.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpvec.rs index 2a01e35..56a12f9 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpvec.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpvec.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpvec/sve_int_cmp_0.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpvec/sve_int_cmp_0.rs index 00bf730..f3eb455 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpvec/sve_int_cmp_0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpvec/sve_int_cmp_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_cmpvec/sve_int_cmp_1.rs b/aarchmrs-instructions/src/A64/sve/sve_cmpvec/sve_int_cmp_1.rs index f19c5c8..5fa7c16 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_cmpvec/sve_int_cmp_1.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_cmpvec/sve_int_cmp_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_countelt.rs b/aarchmrs-instructions/src/A64/sve/sve_countelt.rs index 62375a0..8ae9b43 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_countelt.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_countelt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_count.rs b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_count.rs index c3226d5..06acd2c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_count.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_count.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_countvlv0.rs b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_countvlv0.rs index 1089f58..f6dc748 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_countvlv0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_countvlv0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_countvlv1.rs b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_countvlv1.rs index 559d511..cd73f12 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_countvlv1.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_countvlv1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_pred_pattern_a.rs b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_pred_pattern_a.rs index f55ab52..b87918b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_pred_pattern_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_pred_pattern_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_pred_pattern_b.rs b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_pred_pattern_b.rs index e309cc3..4672b20 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_pred_pattern_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_countelt/sve_int_pred_pattern_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w.rs b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w.rs index 8dbaa96..d5b738c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w/sve_fp8_fma_long.rs b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w/sve_fp8_fma_long.rs index 593a813..eea8d53 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w/sve_fp8_fma_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w/sve_fp8_fma_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w/sve_fp8_fma_long_long.rs b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w/sve_fp8_fma_long_long.rs index 08dd4d0..a0ad2ed 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w/sve_fp8_fma_long_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w/sve_fp8_fma_long_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w_by_indexed_elem.rs index 9dd0230..2b737fb 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w_by_indexed_elem/sve_fp8_fma_long_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w_by_indexed_elem/sve_fp8_fma_long_by_indexed_elem.rs index 52cc008..c3ce64e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w_by_indexed_elem/sve_fp8_fma_long_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_w_by_indexed_elem/sve_fp8_fma_long_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_ww_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_ww_by_indexed_elem.rs index ed0ee58..b7cbfdc 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_ww_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_ww_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_ww_by_indexed_elem/sve_fp8_fma_long_long_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_ww_by_indexed_elem/sve_fp8_fma_long_long_by_indexed_elem.rs index d4ba19c..120597f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_ww_by_indexed_elem/sve_fp8_fma_long_long_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp8_fma_ww_by_indexed_elem/sve_fp8_fma_long_long_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp8_fmmla.rs b/aarchmrs-instructions/src/A64/sve/sve_fp8_fmmla.rs index 86495ff..64ac062 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp8_fmmla.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp8_fmmla.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp8_fmmla/sve_fp8_fmmla.rs b/aarchmrs-instructions/src/A64/sve/sve_fp8_fmmla/sve_fp8_fmmla.rs index ee432ef..c489d16 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp8_fmmla/sve_fp8_fmmla.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp8_fmmla/sve_fp8_fmmla.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_clamp.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_clamp.rs index 7fcd2e9..7dae4c8 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_clamp.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_clamp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_clamp/sve_fp_clamp.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_clamp/sve_fp_clamp.rs index 91b5157..60ac1f0 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_clamp/sve_fp_clamp.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_clamp/sve_fp_clamp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_cmpvev.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_cmpvev.rs index d90fe9f..3792a8d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_cmpvev.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_cmpvev.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_cmpvev/sve_fp_3op_p_pd.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_cmpvev/sve_fp_3op_p_pd.rs index b9b0807..62ec700 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_cmpvev/sve_fp_3op_p_pd.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_cmpvev/sve_fp_3op_p_pd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_cmpzero.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_cmpzero.rs index 6be0bff..666d320 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_cmpzero.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_cmpzero.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_cmpzero/sve_fp_2op_p_pd.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_cmpzero/sve_fp_2op_p_pd.rs index 4529818..b46d762 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_cmpzero/sve_fp_2op_p_pd.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_cmpzero/sve_fp_2op_p_pd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduce.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduce.rs index 56fe5f5..0624a6f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduce.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduce.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduce/sve_fp_fast_red.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduce/sve_fp_fast_red.rs index a4dbced..5c8e5d1 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduce/sve_fp_fast_red.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduce/sve_fp_fast_red.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduceq.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduceq.rs index d64d5d4..87f01af 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduceq.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduceq.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduceq/sve_fp_fast_redq.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduceq/sve_fp_fast_redq.rs index d9202ba..a8ea478 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduceq/sve_fp_fast_redq.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fastreduceq/sve_fp_fast_redq.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcadd.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcadd.rs index 0432d70..57833e1 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcadd.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcadd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcadd/sve_fp_fcadd.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcadd/sve_fp_fcadd.rs index 339cb0b..2c01e1a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcadd/sve_fp_fcadd.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcadd/sve_fp_fcadd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla.rs index 19c7664..690a1bf 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla/sve_fp_fcmla.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla/sve_fp_fcmla.rs index aff24ae..58daea2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla/sve_fp_fcmla.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla/sve_fp_fcmla.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla_by_indexed_elem.rs index 72b6292..41a0fb8 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla_by_indexed_elem/sve_fp_fcmla_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla_by_indexed_elem/sve_fp_fcmla_by_indexed_elem.rs index c6530dc..289d575 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla_by_indexed_elem/sve_fp_fcmla_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcmla_by_indexed_elem/sve_fp_fcmla_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2.rs index 5c41692..44bc6d1 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2/sve_fp_fcvt2.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2/sve_fp_fcvt2.rs index ffcd249..2140b5c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2/sve_fp_fcvt2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2/sve_fp_fcvt2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2z.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2z.rs index e76a2fc..9af2275 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2z.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2z.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2z/sve_fp_fcvt2z.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2z/sve_fp_fcvt2z.rs index 4e96f88..6171bad 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2z/sve_fp_fcvt2z.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fcvt2z/sve_fp_fcvt2z.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma.rs index a2a5aec..ca869d1 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma/sve_fp_3op_p_zds_a.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma/sve_fp_3op_p_zds_a.rs index f60f961..27bd48d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma/sve_fp_3op_p_zds_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma/sve_fp_3op_p_zds_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma/sve_fp_3op_p_zds_b.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma/sve_fp_3op_p_zds_b.rs index 8d81e41..c64617f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma/sve_fp_3op_p_zds_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma/sve_fp_3op_p_zds_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_by_indexed_elem.rs index 0a20464..7b1eeaf 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_by_indexed_elem/sve_fp_fma_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_by_indexed_elem/sve_fp_fma_by_indexed_elem.rs index 2918b7c..b930251 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_by_indexed_elem/sve_fp_fma_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_by_indexed_elem/sve_fp_fma_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w.rs index 16f12c1..228146a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w/sve_fp_fdot.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w/sve_fp_fdot.rs index f55b8c7..6bd8c46 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w/sve_fp_fdot.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w/sve_fp_fdot.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w/sve_fp_fma_long.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w/sve_fp_fma_long.rs index a879187..6a52ab7 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w/sve_fp_fma_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w/sve_fp_fma_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem.rs index 658cebc..8827f2b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem/sve_fp_fdot_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem/sve_fp_fdot_by_indexed_elem.rs index 6989364..45baa64 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem/sve_fp_fdot_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem/sve_fp_fdot_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem/sve_fp_fma_long_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem/sve_fp_fma_long_by_indexed_elem.rs index 1d59f32..1e22028 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem/sve_fp_fma_long_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fma_w_by_indexed_elem/sve_fp_fma_long_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla.rs index b055ca4..492c406 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla/sve_fp_fmmla.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla/sve_fp_fmmla.rs index d0a08d3..b753bdb 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla/sve_fp_fmmla.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla/sve_fp_fmmla.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla_nw.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla_nw.rs index a6115ae..7182f07 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla_nw.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla_nw.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla_nw/sve_fp_fmmla_nw.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla_nw/sve_fp_fmmla_nw.rs index aa5ea89..4b88fd6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla_nw/sve_fp_fmmla_nw.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fmmla_nw/sve_fp_fmmla_nw.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fmul_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fmul_by_indexed_elem.rs index 715ce17..96861c3 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fmul_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fmul_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_fmul_by_indexed_elem/sve_fp_fmul_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_fmul_by_indexed_elem/sve_fp_fmul_by_indexed_elem.rs index ed37031..86f9e87 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_fmul_by_indexed_elem/sve_fp_fmul_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_fmul_by_indexed_elem/sve_fp_fmul_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_pairwise.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_pairwise.rs index f0d9e05..4709198 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_pairwise.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_pairwise.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_pairwise/sve_fp_pairwise.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_pairwise/sve_fp_pairwise.rs index a738782..29cdd40 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_pairwise/sve_fp_pairwise.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_pairwise/sve_fp_pairwise.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_pred.rs index 0506d0f..92d3b1c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_2op_i_p_zds.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_2op_i_p_zds.rs index c2dc904..97067af 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_2op_i_p_zds.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_2op_i_p_zds.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_2op_p_zds.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_2op_p_zds.rs index 06bf282..77b432d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_2op_p_zds.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_2op_p_zds.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_ftmad.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_ftmad.rs index 7f85ae8..b86009c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_ftmad.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_pred/sve_fp_ftmad.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_slowreduce.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_slowreduce.rs index 1d0b5ac..7919c2d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_slowreduce.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_slowreduce.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_slowreduce/sve_fp_2op_p_vd.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_slowreduce/sve_fp_2op_p_vd.rs index 7fdfe02..c34695d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_slowreduce/sve_fp_2op_p_vd.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_slowreduce/sve_fp_2op_p_vd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary.rs index f5e5d7d..4eeae7b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_a.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_a.rs index a9d2832..2be2a36 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_b_0.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_b_0.rs index 434fcb1..24327a6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_b_0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_b_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_b_1.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_b_1.rs index 92ba6ff..3fd3315 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_b_1.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_b_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_c.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_c.rs index 5e78eb8..a9e4757 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_c.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_c.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_d.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_d.rs index d8c57a9..f4746fc 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_d.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary/sve_fp_2op_p_zd_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred.rs index 3386435..2e51afe 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp8_fcvt_narrow.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp8_fcvt_narrow.rs index 5908380..719d984 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp8_fcvt_narrow.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp8_fcvt_narrow.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp8_fcvt_wide.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp8_fcvt_wide.rs index c3fc458..5bcdb23 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp8_fcvt_wide.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp8_fcvt_wide.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_2op_u_zd.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_2op_u_zd.rs index 54ec200..576a0de 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_2op_u_zd.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_2op_u_zd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_fcvtzu_narrow.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_fcvtzu_narrow.rs index 33d14d9..9a5c8cb 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_fcvtzu_narrow.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_fcvtzu_narrow.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_ucvtf_wide.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_ucvtf_wide.rs index 77c706f..6122276 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_ucvtf_wide.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unary_unpred/sve_fp_ucvtf_wide.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unpred.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unpred.rs index f4c6b2b..59a9b5e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unpred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unpred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_unpred/sve_fp_3op_u_zd.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_unpred/sve_fp_3op_u_zd.rs index 19fa04b..a9b89d7 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_unpred/sve_fp_3op_u_zd.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_unpred/sve_fp_3op_u_zd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary.rs index fddd4f1..86be479 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_a.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_a.rs index f0778ef..21ff3c5 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_b_0.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_b_0.rs index 59edb34..e8699f8 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_b_0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_b_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_b_1.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_b_1.rs index 9acde7b..be86ab2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_b_1.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_b_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_c.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_c.rs index d34ba56..630655e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_c.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_c.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_d.rs b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_d.rs index 5542f05..9195362 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_d.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_fp_zeroing_unary/sve_fp_z2op_p_zd_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_index.rs b/aarchmrs-instructions/src/A64/sve/sve_index.rs index 39b443e..8b8397f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_index.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_index.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ii.rs b/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ii.rs index 4f5fbab..c808992 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ii.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ii.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ir.rs b/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ir.rs index 374e501..b085aaa 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ir.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ir.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ri.rs b/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ri.rs index 04c745f..0e59a13 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ri.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_ri.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_rr.rs b/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_rr.rs index f8483c8..8a73200 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_rr.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_index/sve_int_index_rr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_adr.rs b/aarchmrs-instructions/src/A64/sve/sve_int_adr.rs index e40f805..e04ff9f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_adr.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_adr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_adr/sve_int_bin_cons_misc_0_a.rs b/aarchmrs-instructions/src/A64/sve/sve_int_adr/sve_int_bin_cons_misc_0_a.rs index 1cce5f4..f264a3a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_adr/sve_int_bin_cons_misc_0_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_adr/sve_int_bin_cons_misc_0_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred.rs index e8acd7a..aca8b64 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred/sve_int_mladdsub_vvv_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred/sve_int_mladdsub_vvv_pred.rs index 7fcfd19..c28b820 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred/sve_int_mladdsub_vvv_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred/sve_int_mladdsub_vvv_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred/sve_int_mlas_vvv_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred/sve_int_mlas_vvv_pred.rs index d401892..29d3092 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred/sve_int_mlas_vvv_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_muladd_pred/sve_int_mlas_vvv_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin.rs index c74116b..aa25945 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_0.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_0.rs index d823b63..19face4 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_1.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_1.rs index c3791e6..3873b4b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_1.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_2.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_2.rs index 4779f6c..0a1d0af 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_arit_2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_div.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_div.rs index 5d62e5d..9a57d4f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_div.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_div.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_log.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_log.rs index 52bc818..223a9b4 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_log.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_bin/sve_int_bin_pred_log.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red.rs index 99a860e..a3fcb6e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_movprfx_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_movprfx_pred.rs index 1d65948..2781153 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_movprfx_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_movprfx_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_0.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_0.rs index 13f7487..53cfedf 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_0q.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_0q.rs index 2a81c2b..0c3a5be 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_0q.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_0q.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_1.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_1.rs index e5a299c..1cff2e0 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_1.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_1q.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_1q.rs index f4df751..89358d6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_1q.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_1q.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_2.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_2.rs index 5490789..fef0ad5 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_2q.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_2q.rs index 8dc1129..0c1fb14 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_2q.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_red/sve_int_reduce_2q.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift.rs index add9d9d..ff7cd18 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_0.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_0.rs index 3376773..260b482 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_1.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_1.rs index 2206ab7..15f4161 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_1.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_2.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_2.rs index e024e02..011beb4 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_shift/sve_int_bin_pred_shift_2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_un.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_un.rs index 5e4e5ab..8ebdd92 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_un.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_un.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_un/sve_int_un_pred_arit_0.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_un/sve_int_un_pred_arit_0.rs index 57544ac..74dae5f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_un/sve_int_un_pred_arit_0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_un/sve_int_un_pred_arit_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_pred_un/sve_int_un_pred_arit_1.rs b/aarchmrs-instructions/src/A64/sve/sve_int_pred_un/sve_int_un_pred_arit_1.rs index 0d8c71b..37adab5 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_pred_un/sve_int_un_pred_arit_1.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_pred_un/sve_int_un_pred_arit_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_select.rs b/aarchmrs-instructions/src/A64/sve/sve_int_select.rs index 95bb26b..7252177 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_select.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_select.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_select/sve_int_sel_vvv.rs b/aarchmrs-instructions/src/A64/sve/sve_int_select/sve_int_sel_vvv.rs index fec9472..d954271 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_select/sve_int_sel_vvv.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_select/sve_int_sel_vvv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit.rs index 83d60fe..168b7f0 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit/sve_int_bin_cons_arit_0.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit/sve_int_bin_cons_arit_0.rs index b937f69..09f5b1f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit/sve_int_bin_cons_arit_0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit/sve_int_bin_cons_arit_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b.rs index b84928c..9ddb197 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_addqp.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_addqp.rs index d425282..2a60cac 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_addqp.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_addqp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_addsubp.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_addsubp.rs index e994587..9bf22a7 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_addsubp.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_addsubp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_mul_b.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_mul_b.rs index 93cae67..529236a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_mul_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_mul_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_sqdmulh.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_sqdmulh.rs index bb48ff9..4f3b0cf 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_sqdmulh.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_arit_b/sve_int_sqdmulh.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical.rs index 5243a99..7ac64b2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_bin_cons_log.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_bin_cons_log.rs index e0e026b..3a5ebb6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_bin_cons_log.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_bin_cons_log.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_rotate_imm.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_rotate_imm.rs index 1216c1f..80392d5 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_rotate_imm.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_rotate_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_tern_log.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_tern_log.rs index ef7cd05..4ef9bcc 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_tern_log.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_logical/sve_int_tern_log.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc.rs index fd249b2..c34f4e3 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_b.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_b.rs index 65826b0..7bb777b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_c.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_c.rs index cec8580..3dceb37 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_c.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_c.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_d.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_d.rs index ce70ff4..2109835 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_d.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_misc/sve_int_bin_cons_misc_0_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift.rs index af71e78..1ab4a4a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift/sve_int_bin_cons_shift_a.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift/sve_int_bin_cons_shift_a.rs index db66fd3..b08288f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift/sve_int_bin_cons_shift_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift/sve_int_bin_cons_shift_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift/sve_int_bin_cons_shift_b.rs b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift/sve_int_bin_cons_shift_b.rs index f8dc184..9424b67 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift/sve_int_bin_cons_shift_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_int_unpred_shift/sve_int_bin_cons_shift_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_acc.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_acc.rs index d3e0ec5..486edc4 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_acc.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_acc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_aba.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_aba.rs index 8760998..1c5bca3 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_aba.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_aba.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_aba_long.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_aba_long.rs index 47899ee..f8741f5 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_aba_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_aba_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_adc_long.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_adc_long.rs index 9682d15..77c6d36 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_adc_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_adc_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_cadd.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_cadd.rs index d099aae..3123ebd 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_cadd.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_cadd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_shift_insert.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_shift_insert.rs index 4cea60b..43202c2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_shift_insert.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_shift_insert.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_sra.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_sra.rs index 453b5ae..190a4a2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_sra.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_acc/sve_intx_sra.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem.rs index caa13fb..8260548 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_cdot_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_cdot_by_indexed_elem.rs index b4ec29f..fbfbcbe 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_cdot_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_cdot_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_cmla_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_cmla_by_indexed_elem.rs index dd6b87c..890623c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_cmla_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_cmla_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_dot_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_dot_by_indexed_elem.rs index b6e9fa4..c5da320 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_dot_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_dot_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mixed_dot_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mixed_dot_by_indexed_elem.rs index 1d5c3a2..f24b59c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mixed_dot_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mixed_dot_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mla_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mla_by_indexed_elem.rs index 44600be..adef200 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mla_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mla_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mla_long_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mla_long_by_indexed_elem.rs index 162b505..25a7267 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mla_long_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mla_long_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mul_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mul_by_indexed_elem.rs index 0a10abc..8bafc40 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mul_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mul_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mul_long_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mul_long_by_indexed_elem.rs index e2c866f..823345b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mul_long_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_mul_long_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmla_long_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmla_long_by_indexed_elem.rs index 786f34f..40e92d3 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmla_long_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmla_long_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmul_long_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmul_long_by_indexed_elem.rs index 175d1a0..2818aef 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmul_long_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmul_long_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmulh_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmulh_by_indexed_elem.rs index 6866b17..5f714ca 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmulh_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qdmulh_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qrdcmla_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qrdcmla_by_indexed_elem.rs index b23109f..0b14f60 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qrdcmla_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qrdcmla_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qrdmlah_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qrdmlah_by_indexed_elem.rs index ee3458d..b68341e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qrdmlah_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_by_indexed_elem/sve_intx_qrdmlah_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_clamp.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_clamp.rs index d44b09b..6a7186e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_clamp.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_clamp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_clamp/sve_intx_clamp.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_clamp/sve_intx_clamp.rs index afa8131..e0575ca 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_clamp/sve_intx_clamp.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_clamp/sve_intx_clamp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening.rs index f8e6773..97ffbc4 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_arith_long.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_arith_long.rs index 5c419ab..038385d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_arith_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_arith_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_arith_wide.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_arith_wide.rs index 8cf177b..a08c83e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_arith_wide.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_arith_wide.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_mul_long.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_mul_long.rs index 8cb4d7b..feab029 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_mul_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_cons_widening/sve_intx_cons_mul_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive.rs index cf7ea5c..38e0d4a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_clong.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_clong.rs index 0536820..8151b25 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_clong.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_clong.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_eorx.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_eorx.rs index 250637a..7f5b663 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_eorx.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_eorx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_mmla.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_mmla.rs index 836255d..048de92 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_mmla.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_mmla.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_perm_bit.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_perm_bit.rs index c584fe1..e14891a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_perm_bit.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_perm_bit.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_shift_long.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_shift_long.rs index 7793733..aa791be 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_shift_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_constructive/sve_intx_shift_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto.rs index b408945..3a8b45b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_const.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_const.rs index 0ed0a69..04ab75d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_const.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_const.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_dest.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_dest.rs index 550e757..68e1e79 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_dest.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_dest.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_multi2.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_multi2.rs index 31f464e..45f4e91 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_multi2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_multi2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_multi4.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_multi4.rs index edb2aed..ab81e92 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_multi4.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_binary_multi4.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_pmlal_multi.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_pmlal_multi.rs index e70e9e2..5ce8605 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_pmlal_multi.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_pmlal_multi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_pmull_multi.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_pmull_multi.rs index a9a0b9c..11df696 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_pmull_multi.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_pmull_multi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_unary.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_unary.rs index 3efc27b..893d18c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_unary.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_crypto/sve_crypto_unary.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_dot2.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_dot2.rs index 539e328..4f3d59e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_dot2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_dot2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_dot2/sve_intx_dot2.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_dot2/sve_intx_dot2.rs index e7019bf..323cb78 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_dot2/sve_intx_dot2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_dot2/sve_intx_dot2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_dot2_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_dot2_by_indexed_elem.rs index 74eaf10..17cbb10 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_dot2_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_dot2_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_dot2_by_indexed_elem/sve_intx_dot2_by_indexed_elem.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_dot2_by_indexed_elem/sve_intx_dot2_by_indexed_elem.rs index 538e341..af2c114 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_dot2_by_indexed_elem/sve_intx_dot2_by_indexed_elem.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_dot2_by_indexed_elem/sve_intx_dot2_by_indexed_elem.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histcnt.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histcnt.rs index 71fccbc..808dba7 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histcnt.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histcnt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histcnt/sve_intx_histcnt.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histcnt/sve_intx_histcnt.rs index 1c00a82..5420604 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histcnt/sve_intx_histcnt.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histcnt/sve_intx_histcnt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut.rs index 70a675a..13a01e6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_histseg.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_histseg.rs index 9e9981e..a6529bc 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_histseg.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_histseg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut2_16.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut2_16.rs index f692043..d494d21 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut2_16.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut2_16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut2_8.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut2_8.rs index fbd8384..9aff968 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut2_8.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut2_8.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut4_16.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut4_16.rs index 2e7bb1f..71df46a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut4_16.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut4_16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut4_8.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut4_8.rs index 08a2d7e..86c85f2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut4_8.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut4_8.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut6_16.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut6_16.rs index 1f350a4..3ab53a6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut6_16.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut6_16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut6_8.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut6_8.rs index 82c8406..b500448 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut6_8.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_histseg_lut/sve_intx_lut6_8.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred.rs index dc14633..4c1513d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_cdot.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_cdot.rs index 623976c..7c1b304 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_cdot.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_cdot.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_cmla.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_cmla.rs index b62ad74..3437966 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_cmla.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_cmla.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_dot.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_dot.rs index 777f744..6700a34 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_dot.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_dot.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_mixed_dot.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_mixed_dot.rs index c45de3e..b8be460 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_mixed_dot.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_mixed_dot.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_mlal_long.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_mlal_long.rs index 603d2cb..eea37ec 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_mlal_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_mlal_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qdmlal_long.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qdmlal_long.rs index 2dbfde7..c73fb05 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qdmlal_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qdmlal_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qdmlalbt.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qdmlalbt.rs index 7b663bf..f9180fa 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qdmlalbt.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qdmlalbt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qrdmlah.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qrdmlah.rs index 2f9f7fc..6222d36 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qrdmlah.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_muladd_unpred/sve_intx_qrdmlah.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing.rs index 2e2d6d2..a01d4c0 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_arith_narrow.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_arith_narrow.rs index 343a885..2da6d5d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_arith_narrow.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_arith_narrow.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_extract_narrow.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_extract_narrow.rs index acdafa6..ea53f4c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_extract_narrow.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_extract_narrow.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_multi_extract_narrow.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_multi_extract_narrow.rs index 73c2829..00563af 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_multi_extract_narrow.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_multi_extract_narrow.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_multi_shift_narrow.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_multi_shift_narrow.rs index b45fce0..131f9c6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_multi_shift_narrow.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_multi_shift_narrow.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_shift_narrow.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_shift_narrow.rs index 30c33a4..95b025e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_shift_narrow.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_narrowing/sve_intx_shift_narrow.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated.rs index 7f28e12..de22e86 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_accumulate_long_pairs.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_accumulate_long_pairs.rs index 5bafef2..ab6aab0 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_accumulate_long_pairs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_accumulate_long_pairs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_arith_binary_pairs.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_arith_binary_pairs.rs index 5cbc033..e68c27e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_arith_binary_pairs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_arith_binary_pairs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_bin_pred_shift_sat_round.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_bin_pred_shift_sat_round.rs index 9fc9e0e..b8feb54 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_bin_pred_shift_sat_round.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_bin_pred_shift_sat_round.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_binary.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_binary.rs index 358c352..b8768f6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_binary.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_binary.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_binary_sat.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_binary_sat.rs index a3e8f40..6b0b14b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_binary_sat.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_binary_sat.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_unary.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_unary.rs index 082672c..705bbca 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_unary.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_predicated/sve_intx_pred_arith_unary.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_string.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_string.rs index 2cc30ff..2405d7b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_string.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_string.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_intx_string/sve_intx_match.rs b/aarchmrs-instructions/src/A64/sve/sve_intx_string/sve_intx_match.rs index 28378a4..9b5736c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_intx_string/sve_intx_match.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_intx_string/sve_intx_match.rs @@ -1,11 +1,11 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ pub mod match_p_p_zz_ { #[cfg(feature = "meta")] - pub const OPCODE_MASK: u32 = 0b11111111001000001110000000010000u32; + pub const OPCODE_MASK: u32 = 0b11111111101000001110000000010000u32; #[cfg(feature = "meta")] pub const OPCODE: u32 = 0b01000101001000001000000000000000u32; #[cfg(feature = "meta")] @@ -38,21 +38,21 @@ pub mod match_p_p_zz_ { pub const FIELD_Zm_WIDTH: u32 = 5u32; #[cfg(feature = "meta_field")] #[allow(nonstandard_style)] - pub const FIELD_size_OFFSET: u32 = 22u32; + pub const FIELD_sz_OFFSET: u32 = 22u32; #[cfg(feature = "meta_field")] #[allow(nonstandard_style)] - pub const FIELD_size_WIDTH: u32 = 2u32; + pub const FIELD_sz_WIDTH: u32 = 1u32; #[inline] pub const fn match_p_p_zz_( - size: ::aarchmrs_types::BitValue<2>, + sz: ::aarchmrs_types::BitValue<1>, Zm: ::aarchmrs_types::BitValue<5>, Pg: ::aarchmrs_types::BitValue<3>, Zn: ::aarchmrs_types::BitValue<5>, Pd: ::aarchmrs_types::BitValue<4>, ) -> ::aarchmrs_types::InstructionCode { ::aarchmrs_types::InstructionCode::from_u32( - 0b01000101u32 << 24u32 - | size.into_inner() << 22u32 + 0b010001010u32 << 23u32 + | sz.into_inner() << 22u32 | 0b1u32 << 21u32 | Zm.into_inner() << 16u32 | 0b100u32 << 13u32 @@ -65,7 +65,7 @@ pub mod match_p_p_zz_ { } pub mod nmatch_p_p_zz_ { #[cfg(feature = "meta")] - pub const OPCODE_MASK: u32 = 0b11111111001000001110000000010000u32; + pub const OPCODE_MASK: u32 = 0b11111111101000001110000000010000u32; #[cfg(feature = "meta")] pub const OPCODE: u32 = 0b01000101001000001000000000010000u32; #[cfg(feature = "meta")] @@ -98,21 +98,21 @@ pub mod nmatch_p_p_zz_ { pub const FIELD_Zm_WIDTH: u32 = 5u32; #[cfg(feature = "meta_field")] #[allow(nonstandard_style)] - pub const FIELD_size_OFFSET: u32 = 22u32; + pub const FIELD_sz_OFFSET: u32 = 22u32; #[cfg(feature = "meta_field")] #[allow(nonstandard_style)] - pub const FIELD_size_WIDTH: u32 = 2u32; + pub const FIELD_sz_WIDTH: u32 = 1u32; #[inline] pub const fn nmatch_p_p_zz_( - size: ::aarchmrs_types::BitValue<2>, + sz: ::aarchmrs_types::BitValue<1>, Zm: ::aarchmrs_types::BitValue<5>, Pg: ::aarchmrs_types::BitValue<3>, Zn: ::aarchmrs_types::BitValue<5>, Pd: ::aarchmrs_types::BitValue<4>, ) -> ::aarchmrs_types::InstructionCode { ::aarchmrs_types::InstructionCode::from_u32( - 0b01000101u32 << 24u32 - | size.into_inner() << 22u32 + 0b010001010u32 << 23u32 + | sz.into_inner() << 22u32 | 0b1u32 << 21u32 | Zm.into_inner() << 16u32 | 0b100u32 << 13u32 diff --git a/aarchmrs-instructions/src/A64/sve/sve_maskimm.rs b/aarchmrs-instructions/src/A64/sve/sve_maskimm.rs index 793b84e..3ae2761 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_maskimm.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_maskimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_maskimm/sve_int_dup_mask_imm.rs b/aarchmrs-instructions/src/A64/sve/sve_maskimm/sve_int_dup_mask_imm.rs index 9e71e4f..689266b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_maskimm/sve_int_dup_mask_imm.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_maskimm/sve_int_dup_mask_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_maskimm/sve_int_log_imm.rs b/aarchmrs-instructions/src/A64/sve/sve_maskimm/sve_int_log_imm.rs index 4d3de83..2a81caa 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_maskimm/sve_int_log_imm.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_maskimm/sve_int_log_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32.rs index 744d0df..62d7f4e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_fill.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_fill.rs index f654493..a68f58e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_fill.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_fill.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_sv_a.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_sv_a.rs index 3dc4ae2..4d3c830 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_sv_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_sv_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_sv_b.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_sv_b.rs index f79e81f..19b741d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_sv_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_sv_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_vi.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_vi.rs index c7243de..3a8406c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_vi.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_vi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_vs.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_vs.rs index 2668e6f..58e7cae 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_vs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gld_vs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gldnt_vs.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gldnt_vs.rs index c38e634..33a737e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gldnt_vs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_gldnt_vs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_pfill.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_pfill.rs index ed713ac..58c8ec5 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_pfill.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_pfill.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_prfm_sv.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_prfm_sv.rs index 099edc0..29abcb2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_prfm_sv.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_prfm_sv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_prfm_vi.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_prfm_vi.rs index 13a8240..ad7226b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_prfm_vi.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_32b_prfm_vi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_ld_dup.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_ld_dup.rs index 24f15d9..63dac85 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_ld_dup.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_ld_dup.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_prfm_si.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_prfm_si.rs index 3be2d36..5cf8f70 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_prfm_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_prfm_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_prfm_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_prfm_ss.rs index 21d86ba..68de004 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_prfm_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem32/sve_mem_prfm_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64.rs index f9f0860..482ab40 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_sv.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_sv.rs index f7ab686..f7035b6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_sv.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_sv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_sv2.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_sv2.rs index d6fff5b..cf10adc 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_sv2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_sv2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vi.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vi.rs index 1905a49..5a56510 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vi.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vs.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vs.rs index 6a847ee..702608d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vs2.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vs2.rs index c1ca123..05fc677 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vs2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gld_vs2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gldnt_vs.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gldnt_vs.rs index 09c1e90..ef592a3 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gldnt_vs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gldnt_vs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gldq_vs.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gldq_vs.rs index 057eabb..2cb4de6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gldq_vs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_gldq_vs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_sv.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_sv.rs index a463855..22958bb 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_sv.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_sv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_sv2.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_sv2.rs index 3ed4528..60fac3d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_sv2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_sv2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_vi.rs b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_vi.rs index 762e2da..7be2be6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_vi.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_mem64/sve_mem_64b_prfm_vi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld.rs index 0bd985e..f2f88cb 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_si.rs index 38a62b5..b1d3c07 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_si_q.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_si_q.rs index 67c1e65..5ce9b9c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_si_q.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_si_q.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_ss.rs index 5bc3d49..88f0120 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_ss_q.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_ss_q.rs index 583765e..6ea2c5c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_ss_q.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cld_ss_q.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldff_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldff_ss.rs index 8ca0dff..eb374f8 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldff_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldff_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnf_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnf_si.rs index 6f9ebf5..1621dbd 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnf_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnf_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnt_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnt_si.rs index 2d63d1f..a6ec71f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnt_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnt_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnt_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnt_ss.rs index 1f111fe..59482de 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnt_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_cldnt_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eld_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eld_si.rs index 78eb1cd..bc84830 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eld_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eld_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eld_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eld_ss.rs index 9fded66..b133166 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eld_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eld_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eldq_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eldq_si.rs index 0e9163a..c5eeeef 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eldq_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eldq_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eldq_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eldq_ss.rs index 4824830..d41942f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eldq_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_eldq_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_ldqr_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_ldqr_si.rs index 8a98d32..de66dcd 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_ldqr_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_ldqr_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_ldqr_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_ldqr_ss.rs index 91dcb5d..f8b4453 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_ldqr_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcld/sve_mem_ldqr_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcst_nt.rs b/aarchmrs-instructions/src/A64/sve/sve_memcst_nt.rs index d400061..efd0e6f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcst_nt.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcst_nt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcst_nt/sve_mem_cstnt_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memcst_nt/sve_mem_cstnt_ss.rs index 8916305..a0ed7fc 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcst_nt/sve_mem_cstnt_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcst_nt/sve_mem_cstnt_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memcst_nt/sve_mem_est_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memcst_nt/sve_mem_est_ss.rs index f231b23..067d6aa 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memcst_nt/sve_mem_est_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memcst_nt/sve_mem_est_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memsst_nt.rs b/aarchmrs-instructions/src/A64/sve/sve_memsst_nt.rs index 967203d..d619095 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memsst_nt.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memsst_nt.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstnt_32b_vs.rs b/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstnt_32b_vs.rs index 78906bc..4b79553 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstnt_32b_vs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstnt_32b_vs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstnt_64b_vs.rs b/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstnt_64b_vs.rs index e7f985a..0e90c8b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstnt_64b_vs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstnt_64b_vs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstq_64b_vs.rs b/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstq_64b_vs.rs index d44aee1..fdcbfed 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstq_64b_vs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memsst_nt/sve_mem_sstq_64b_vs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_cs.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_cs.rs index ef242c7..50525be 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_cs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_cs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_cst_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_cst_ss.rs index 58f0ed9..62bd355 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_cst_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_cst_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_estq_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_estq_si.rs index ce229ce..7753d2b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_estq_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_estq_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_estq_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_estq_ss.rs index ee943be..26cefb4 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_estq_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_estq_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_pspill.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_pspill.rs index b8be9f6..cc57cd8 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_pspill.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_pspill.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_spill.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_spill.rs index 35e3aac..5e1d206 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_spill.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_cs/sve_mem_spill.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_si.rs index 1e64188..f84a19a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_cst_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_cst_si.rs index df85af6..e39244b 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_cst_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_cst_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_cstnt_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_cstnt_si.rs index 311d97d..34ea261 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_cstnt_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_cstnt_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_est_si.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_est_si.rs index cd33d13..7152b26 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_est_si.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_si/sve_mem_est_si.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss.rs index 7909d1f..a66cfca 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_sv_a.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_sv_a.rs index 9ab0981..f42b925 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_sv_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_sv_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_sv_b.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_sv_b.rs index 3fbcf97..ce20571 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_sv_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_sv_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_vs_a.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_vs_a.rs index 3b7f50c..448a6d8 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_vs_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_vs_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_vs_b.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_vs_b.rs index 91f65a4..23441cd 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_vs_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss/sve_mem_sst_vs_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2.rs index dbae985..c882657 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_sv2.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_sv2.rs index 879b098..2452c75 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_sv2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_sv2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vi_a.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vi_a.rs index 427cccc..cbd60e7 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vi_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vi_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vi_b.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vi_b.rs index f45d498..1bee928 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vi_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vi_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vs2.rs b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vs2.rs index 0ec8d0f..ac01a06 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vs2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_memst_ss2/sve_mem_sst_vs2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_extract.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_extract.rs index 27d75b0..7c2e5c4 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_extract.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_extract.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_extract/sve_int_perm_extract_i.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_extract/sve_int_perm_extract_i.rs index e7ac179..206ca6e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_extract/sve_int_perm_extract_i.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_extract/sve_int_perm_extract_i.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_extract/sve_intx_perm_extract_i.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_extract/sve_intx_perm_extract_i.rs index f3c30de..0fbbe22 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_extract/sve_intx_perm_extract_i.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_extract/sve_intx_perm_extract_i.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_inter.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_inter.rs index d834e45..fccaac2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_inter.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_inter.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_inter/sve_int_perm_bin_perm_zz.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_inter/sve_int_perm_bin_perm_zz.rs index a4332ff..b344251 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_inter/sve_int_perm_bin_perm_zz.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_inter/sve_int_perm_bin_perm_zz.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_inter_long.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_inter_long.rs index 32e8d1c..fea986e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_inter_long.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_inter_long.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_inter_long/sve_int_perm_bin_long_perm_zz.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_inter_long/sve_int_perm_bin_long_perm_zz.rs index 8a15181..aa37841 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_inter_long/sve_int_perm_bin_long_perm_zz.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_inter_long/sve_int_perm_bin_long_perm_zz.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred.rs index 245f65f..79801ff 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_rz.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_rz.rs index 6325b71..1a1fe79 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_rz.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_rz.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_vz.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_vz.rs index 6750303..3c4d993 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_vz.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_vz.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_zz.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_zz.rs index f2b8f0f..3d97799 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_zz.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_clast_zz.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_compact.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_compact.rs index e9f05db..589aa2c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_compact.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_compact.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_cpy_r.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_cpy_r.rs index d9a6356..78ab415 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_cpy_r.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_cpy_r.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_cpy_v.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_cpy_v.rs index 1cae0c8..9cf9b09 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_cpy_v.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_cpy_v.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_expand.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_expand.rs index 199ef59..df4a330 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_expand.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_expand.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_last_r.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_last_r.rs index 7ba15d6..5630022 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_last_r.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_last_r.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_last_v.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_last_v.rs index 589f6ca..aad251a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_last_v.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_last_v.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_rev.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_rev.rs index 2b0c67c..dd457b4 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_rev.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_rev.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_revd.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_revd.rs index c12344f..b33cd42 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_revd.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_revd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_splice.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_splice.rs index e9dc249..4178296 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_splice.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_int_perm_splice.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_intx_perm_splice.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_intx_perm_splice.rs index 6a0f510..1534694 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_intx_perm_splice.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_pred/sve_intx_perm_splice.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_predicates.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_predicates.rs index 88b3799..dee5594 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_predicates.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_predicates.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_bin_perm_pp.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_bin_perm_pp.rs index acb4a11..b06b850 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_bin_perm_pp.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_bin_perm_pp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_punpk.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_punpk.rs index 8c27a79..bc3548c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_punpk.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_punpk.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_reverse_p.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_reverse_p.rs index 2b64d24..53de74d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_reverse_p.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_predicates/sve_int_perm_reverse_p.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a.rs index 6ae82fb..0b186d9 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a/sve_int_perm_dupq_i.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a/sve_int_perm_dupq_i.rs index b3adcb8..069161d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a/sve_int_perm_dupq_i.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a/sve_int_perm_dupq_i.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a/sve_int_perm_extq.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a/sve_int_perm_extq.rs index 93c3f4a..2e7ce1e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a/sve_int_perm_extq.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_a/sve_int_perm_extq.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_b.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_b.rs index 7f2114d..7f15ea6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_b/sve_int_perm_binquads.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_b/sve_int_perm_binquads.rs index d823382..ab01310 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_b/sve_int_perm_binquads.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_b/sve_int_perm_binquads.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_c.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_c.rs index 6986abc..e4790ab 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_c.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_c.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_c/sve_int_perm_tbxquads.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_c/sve_int_perm_tbxquads.rs index cffbeaa..dee9bd3 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_quads_c/sve_int_perm_tbxquads.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_quads_c/sve_int_perm_tbxquads.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_a.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_a.rs index 5f0f71c..41d802d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_a/sve_int_perm_dup_i.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_a/sve_int_perm_dup_i.rs index 404348d..71426e6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_a/sve_int_perm_dup_i.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_a/sve_int_perm_dup_i.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_b.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_b.rs index 15b81e1..e72b518 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_b/sve_int_perm_tbl_3src.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_b/sve_int_perm_tbl_3src.rs index 57bb5ca..c2d251d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_b/sve_int_perm_tbl_3src.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_b/sve_int_perm_tbl_3src.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_c.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_c.rs index 90bb59f..aeb3b09 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_c.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_c.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_c/sve_int_perm_tbl.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_c/sve_int_perm_tbl.rs index b431dc1..86206da 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_c/sve_int_perm_tbl.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_c/sve_int_perm_tbl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d.rs index 34d064f..4b85abc 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_mov_p2v.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_mov_p2v.rs index f8425dd..38682bd 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_mov_p2v.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_mov_p2v.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_mov_v2p.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_mov_v2p.rs index b415b3e..e5dd2f7 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_mov_v2p.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_mov_v2p.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_dup_r.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_dup_r.rs index 365556e..4916bbb 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_dup_r.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_dup_r.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_insrs.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_insrs.rs index 7d56359..a55fc8a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_insrs.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_insrs.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_insrv.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_insrv.rs index b85bf9b..fb44eec 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_insrv.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_insrv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_reverse_z.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_reverse_z.rs index 8de341a..a845f9c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_reverse_z.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_reverse_z.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_unpk.rs b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_unpk.rs index a1df52d..9ed6e08 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_unpk.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_perm_unpred_d/sve_int_perm_unpk.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_count_a.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_count_a.rs index 7dfdef9..7d8920d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_count_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_count_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_count_a/sve_int_pcount_pn.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_count_a/sve_int_pcount_pn.rs index 3bcb32a..33f42b5 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_count_a/sve_int_pcount_pn.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_count_a/sve_int_pcount_pn.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_count_a/sve_int_pcount_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_count_a/sve_int_pcount_pred.rs index ec79eee..c97a379 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_count_a/sve_int_pcount_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_count_a/sve_int_pcount_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b.rs index 5378eb6..1247c4a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_r.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_r.rs index e7204aa..612348d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_r.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_r.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_r_sat.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_r_sat.rs index 74e8ce0..4b920de 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_r_sat.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_r_sat.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_v.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_v.rs index b9cc871..f0b3152 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_v.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_v.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_v_sat.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_v_sat.rs index b1ed9c5..1a4a09f 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_v_sat.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_count_b/sve_int_count_v_sat.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_dup.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_dup.rs index 85ade89..b5b7073 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_dup.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_dup.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_dup/sve_int_pred_dup.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_dup/sve_int_pred_dup.rs index 3fc80db..84754da 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_dup/sve_int_pred_dup.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_dup/sve_int_pred_dup.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_a.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_a.rs index 6b75dc5..d7f6464 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_a.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_a.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_a/sve_int_pred_log.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_a/sve_int_pred_log.rs index e2e3b0f..bfe3a16 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_a/sve_int_pred_log.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_a/sve_int_pred_log.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_b.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_b.rs index 8030e81..19010c6 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_b.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_b/sve_int_brkp.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_b/sve_int_brkp.rs index 5e78b28..cef6f43 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_b/sve_int_brkp.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_b/sve_int_brkp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c.rs index 822df30..1ebefb2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c/sve_int_break.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c/sve_int_break.rs index 8bedafe..2fb24ee 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c/sve_int_break.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c/sve_int_break.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c/sve_int_brkn.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c/sve_int_brkn.rs index d2fe52a..b637da9 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c/sve_int_brkn.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_c/sve_int_brkn.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d.rs index 0086ba6..bd9142e 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pfalse.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pfalse.rs index 5383ed6..d4c7440 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pfalse.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pfalse.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pfirst.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pfirst.rs index ca2a13a..3d7b693 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pfirst.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pfirst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pnext.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pnext.rs index eeb83a7..1049179 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pnext.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_pnext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_ptest.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_ptest.rs index 5f292fd..9019629 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_ptest.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_ptest.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_ptrue.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_ptrue.rs index a92a9ab..4092d8a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_ptrue.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_ptrue.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_rdffr.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_rdffr.rs index fbcac76..e1c93c9 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_rdffr.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_rdffr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_rdffr_2.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_rdffr_2.rs index 9672b70..fad254a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_rdffr_2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_gen_d/sve_int_rdffr_2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr.rs index c97b694..e0e3fb5 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr/sve_int_setffr.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr/sve_int_setffr.rs index b995a00..ab1cc48 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr/sve_int_setffr.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr/sve_int_setffr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr/sve_int_wrffr.rs b/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr/sve_int_wrffr.rs index ab3b4fd..4e7badb 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr/sve_int_wrffr.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_pred_wrffr/sve_int_wrffr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_ptr_muladd_unpred.rs b/aarchmrs-instructions/src/A64/sve/sve_ptr_muladd_unpred.rs index 0c6252c..08bbd47 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_ptr_muladd_unpred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_ptr_muladd_unpred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_ptr_muladd_unpred/sve_ptr_muladd_unpred.rs b/aarchmrs-instructions/src/A64/sve/sve_ptr_muladd_unpred/sve_ptr_muladd_unpred.rs index 26e0366..ef1c073 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_ptr_muladd_unpred/sve_ptr_muladd_unpred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_ptr_muladd_unpred/sve_ptr_muladd_unpred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_while_pn.rs b/aarchmrs-instructions/src/A64/sve/sve_while_pn.rs index 1b6d634..479ea91 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_while_pn.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_while_pn.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_ctr_to_mask.rs b/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_ctr_to_mask.rs index 13f06dc..a3ba266 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_ctr_to_mask.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_ctr_to_mask.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_pn_ptrue.rs b/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_pn_ptrue.rs index 7742875..d2d2a32 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_pn_ptrue.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_pn_ptrue.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_while_rr_pair.rs b/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_while_rr_pair.rs index ffc26a5..fa58e42 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_while_rr_pair.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_while_rr_pair.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_while_rr_pn.rs b/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_while_rr_pn.rs index 9e57014..c23193a 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_while_rr_pn.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_while_pn/sve_int_while_rr_pn.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred.rs index e3a5018..d10d7ea 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred/sve_int_dup_fpimm_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred/sve_int_dup_fpimm_pred.rs index 42ecdff..1f8378c 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred/sve_int_dup_fpimm_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred/sve_int_dup_fpimm_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred/sve_int_dup_imm_pred.rs b/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred/sve_int_dup_imm_pred.rs index 5e1424b..d19e6ea 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred/sve_int_dup_imm_pred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_wideimm_pred/sve_int_dup_imm_pred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred.rs b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred.rs index 3954ef0..8f4eed4 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm0.rs b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm0.rs index 9e63016..41d99d2 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm0.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm1.rs b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm1.rs index 7238533..b34e51d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm1.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm2.rs b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm2.rs index d0bac8c..6852e18 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm2.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_arith_imm2.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_dup_fpimm.rs b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_dup_fpimm.rs index 850ee95..725087d 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_dup_fpimm.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_dup_fpimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_dup_imm.rs b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_dup_imm.rs index 616160a..e4feca5 100644 --- a/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_dup_imm.rs +++ b/aarchmrs-instructions/src/A64/sve/sve_wideimm_unpred/sve_int_dup_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32.rs b/aarchmrs-instructions/src/T32.rs index a5635b7..2f37dbe 100644 --- a/aarchmrs-instructions/src/T32.rs +++ b/aarchmrs-instructions/src/T32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/b16.rs b/aarchmrs-instructions/src/T32/b16.rs index 9151cf1..5efd0fa 100644 --- a/aarchmrs-instructions/src/T32/b16.rs +++ b/aarchmrs-instructions/src/T32/b16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n.rs b/aarchmrs-instructions/src/T32/n.rs index d3d9dc5..0bb91ac 100644 --- a/aarchmrs-instructions/src/T32/n.rs +++ b/aarchmrs-instructions/src/T32/n.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/addpcsp16.rs b/aarchmrs-instructions/src/T32/n/addpcsp16.rs index eaa7948..e85699e 100644 --- a/aarchmrs-instructions/src/T32/n/addpcsp16.rs +++ b/aarchmrs-instructions/src/T32/n/addpcsp16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/brc.rs b/aarchmrs-instructions/src/T32/n/brc.rs index 6a721be..211ea7c 100644 --- a/aarchmrs-instructions/src/T32/n/brc.rs +++ b/aarchmrs-instructions/src/T32/n/brc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/brc/bcond16.rs b/aarchmrs-instructions/src/T32/n/brc/bcond16.rs index 19147ee..d22f828 100644 --- a/aarchmrs-instructions/src/T32/n/brc/bcond16.rs +++ b/aarchmrs-instructions/src/T32/n/brc/bcond16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/brc/except16.rs b/aarchmrs-instructions/src/T32/n/brc/except16.rs index 4a7170b..324cc17 100644 --- a/aarchmrs-instructions/src/T32/n/brc/except16.rs +++ b/aarchmrs-instructions/src/T32/n/brc/except16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/dpint16_2l.rs b/aarchmrs-instructions/src/T32/n/dpint16_2l.rs index 7b56ea8..89e0af1 100644 --- a/aarchmrs-instructions/src/T32/n/dpint16_2l.rs +++ b/aarchmrs-instructions/src/T32/n/dpint16_2l.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/ldlit16.rs b/aarchmrs-instructions/src/T32/n/ldlit16.rs index 56d7b02..327fb55 100644 --- a/aarchmrs-instructions/src/T32/n/ldlit16.rs +++ b/aarchmrs-instructions/src/T32/n/ldlit16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/ldst16_imm.rs b/aarchmrs-instructions/src/T32/n/ldst16_imm.rs index 0298b4d..79d23cb 100644 --- a/aarchmrs-instructions/src/T32/n/ldst16_imm.rs +++ b/aarchmrs-instructions/src/T32/n/ldst16_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/ldst16_reg.rs b/aarchmrs-instructions/src/T32/n/ldst16_reg.rs index 05f43ce..9a9e651 100644 --- a/aarchmrs-instructions/src/T32/n/ldst16_reg.rs +++ b/aarchmrs-instructions/src/T32/n/ldst16_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/ldst16_sp.rs b/aarchmrs-instructions/src/T32/n/ldst16_sp.rs index 83feb91..9adbc1c 100644 --- a/aarchmrs-instructions/src/T32/n/ldst16_sp.rs +++ b/aarchmrs-instructions/src/T32/n/ldst16_sp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/ldsth16_imm.rs b/aarchmrs-instructions/src/T32/n/ldsth16_imm.rs index befc688..380e696 100644 --- a/aarchmrs-instructions/src/T32/n/ldsth16_imm.rs +++ b/aarchmrs-instructions/src/T32/n/ldsth16_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/ldstm16.rs b/aarchmrs-instructions/src/T32/n/ldstm16.rs index 2f88c8c..f366243 100644 --- a/aarchmrs-instructions/src/T32/n/ldstm16.rs +++ b/aarchmrs-instructions/src/T32/n/ldstm16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16.rs b/aarchmrs-instructions/src/T32/n/misc16.rs index a9e5635..3b69d99 100644 --- a/aarchmrs-instructions/src/T32/n/misc16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/adjsp16.rs b/aarchmrs-instructions/src/T32/n/misc16/adjsp16.rs index 9fa629a..6e8538a 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/adjsp16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/adjsp16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/bkpt16.rs b/aarchmrs-instructions/src/T32/n/misc16/bkpt16.rs index 7ae18a4..24f3487 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/bkpt16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/bkpt16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/cbznz16.rs b/aarchmrs-instructions/src/T32/n/misc16/cbznz16.rs index 298dc6d..8d57429 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/cbznz16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/cbznz16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/cps16.rs b/aarchmrs-instructions/src/T32/n/misc16/cps16.rs index 21d5a6a..e820ffa 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/cps16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/cps16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/ext16.rs b/aarchmrs-instructions/src/T32/n/misc16/ext16.rs index da6a934..4c4a932 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/ext16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/ext16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/hints16.rs b/aarchmrs-instructions/src/T32/n/misc16/hints16.rs index a522ead..f0324d7 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/hints16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/hints16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/hlt16.rs b/aarchmrs-instructions/src/T32/n/misc16/hlt16.rs index 45ebcd9..08af72c 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/hlt16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/hlt16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/it16.rs b/aarchmrs-instructions/src/T32/n/misc16/it16.rs index c22b10a..db46ac8 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/it16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/it16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/pushpop16.rs b/aarchmrs-instructions/src/T32/n/misc16/pushpop16.rs index 24ba85b..bcd484b 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/pushpop16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/pushpop16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/rev16.rs b/aarchmrs-instructions/src/T32/n/misc16/rev16.rs index f70f50f..f292202 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/rev16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/rev16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/misc16/setpan16.rs b/aarchmrs-instructions/src/T32/n/misc16/setpan16.rs index 2a13634..e16e855 100644 --- a/aarchmrs-instructions/src/T32/n/misc16/setpan16.rs +++ b/aarchmrs-instructions/src/T32/n/misc16/setpan16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/sftdpi.rs b/aarchmrs-instructions/src/T32/n/sftdpi.rs index 63df244..60108fe 100644 --- a/aarchmrs-instructions/src/T32/n/sftdpi.rs +++ b/aarchmrs-instructions/src/T32/n/sftdpi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_1l_imm.rs b/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_1l_imm.rs index 9eb88bb..ecbaab0 100644 --- a/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_1l_imm.rs +++ b/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_1l_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_2l_imm.rs b/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_2l_imm.rs index 0c83cf1..d55f685 100644 --- a/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_2l_imm.rs +++ b/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_2l_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_3l.rs b/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_3l.rs index 3c63c22..e314d50 100644 --- a/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_3l.rs +++ b/aarchmrs-instructions/src/T32/n/sftdpi/addsub16_3l.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/sftdpi/shift16_imm.rs b/aarchmrs-instructions/src/T32/n/sftdpi/shift16_imm.rs index 97604f9..03b6739 100644 --- a/aarchmrs-instructions/src/T32/n/sftdpi/shift16_imm.rs +++ b/aarchmrs-instructions/src/T32/n/sftdpi/shift16_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/spcd.rs b/aarchmrs-instructions/src/T32/n/spcd.rs index 9c7580f..326304c 100644 --- a/aarchmrs-instructions/src/T32/n/spcd.rs +++ b/aarchmrs-instructions/src/T32/n/spcd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/spcd/addsub16_2h.rs b/aarchmrs-instructions/src/T32/n/spcd/addsub16_2h.rs index e2768f0..f6426ab 100644 --- a/aarchmrs-instructions/src/T32/n/spcd/addsub16_2h.rs +++ b/aarchmrs-instructions/src/T32/n/spcd/addsub16_2h.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/n/spcd/bx16.rs b/aarchmrs-instructions/src/T32/n/spcd/bx16.rs index 6699822..cdf6803 100644 --- a/aarchmrs-instructions/src/T32/n/spcd/bx16.rs +++ b/aarchmrs-instructions/src/T32/n/spcd/bx16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w.rs b/aarchmrs-instructions/src/T32/w.rs index c7d56eb..2e52d8a 100644 --- a/aarchmrs-instructions/src/T32/w.rs +++ b/aarchmrs-instructions/src/T32/w.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl.rs b/aarchmrs-instructions/src/T32/w/bcrtrl.rs index edd80c3..29dd0b7 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/b.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/b.rs index 8fb03fb..33243f9 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/b.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/b.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/bcond.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/bcond.rs index 319c9ef..5fb3422 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/bcond.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/bcond.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/bl.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/bl.rs index 97613dc..78fb909 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/bl.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/bl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/blx.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/blx.rs index 6153842..dd0791b 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/blx.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/blx.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/bx_jaz.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/bx_jaz.rs index e914a01..6d69727 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/bx_jaz.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/bx_jaz.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/cps.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/cps.rs index 79ad1bd..7d55ac0 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/cps.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/cps.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/dcps.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/dcps.rs index 7931ba9..9511578 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/dcps.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/dcps.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/eret.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/eret.rs index deacdb2..9aeccb9 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/eret.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/eret.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/except.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/except.rs index 41506eb..7487c98 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/except.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/except.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/hints.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/hints.rs index f67de5d..71900dd 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/hints.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/hints.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/mrs_bank.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/mrs_bank.rs index 96fa0b2..057027b 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/mrs_bank.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/mrs_bank.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/mrs_spec.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/mrs_spec.rs index dc142f0..e230ae2 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/mrs_spec.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/mrs_spec.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/msr_bank.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/msr_bank.rs index 53d2bbc..2406e60 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/msr_bank.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/msr_bank.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/msr_spec.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/msr_spec.rs index 83392ac..821c2fb 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/msr_spec.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/msr_spec.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/bcrtrl/system.rs b/aarchmrs-instructions/src/T32/w/bcrtrl/system.rs index 2063eba..a8b8639 100644 --- a/aarchmrs-instructions/src/T32/w/bcrtrl/system.rs +++ b/aarchmrs-instructions/src/T32/w/bcrtrl/system.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf.rs b/aarchmrs-instructions/src/T32/w/cpaf.rs index 62d4345..2d46e19 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext.rs b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext.rs index 32d3201..c7b1298 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_csel.rs b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_csel.rs index a6eaaa1..2f1d6c1 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_csel.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_csel.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_extins.rs b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_extins.rs index b231eab..f98a3ff 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_extins.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_extins.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_minmax.rs b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_minmax.rs index 24f4e1e..6d6286e 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_minmax.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_minmax.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_toint.rs b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_toint.rs index 6e6d373..1e5e422 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_toint.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/fp_toint.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/simd_3sameext.rs b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/simd_3sameext.rs index 9645195..b123d1f 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/simd_3sameext.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/simd_3sameext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/tfloatdpmac.rs b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/tfloatdpmac.rs index f8f8b7e..3c2c1d4 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/tfloatdpmac.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/tfloatdpmac.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/tsimd_dotprod.rs b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/tsimd_dotprod.rs index 7c8b576..ea19262 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/tsimd_dotprod.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/advsimdext/tsimd_dotprod.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/fpdp.rs b/aarchmrs-instructions/src/T32/w/cpaf/fpdp.rs index 301c8ce..90cdb94 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/fpdp.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/fpdp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_2r.rs b/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_2r.rs index 0ec761e..b66fdcd 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_2r.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_2r.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_3r.rs b/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_3r.rs index 4f9557f..4e96279 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_3r.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_3r.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_movi.rs b/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_movi.rs index 26ff5d6..d9e4977 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_movi.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/fpdp/fp_movi.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp.rs index 90d1054..a11e1fa 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/simd_3same.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/simd_3same.rs index 130a06a..ed2df7c 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/simd_3same.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/simd_3same.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg.rs index 3e14868..5f41778 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg/simd_1r_imm.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg/simd_1r_imm.rs index 7ed3c44..277f93f 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg/simd_1r_imm.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg/simd_1r_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg/simd_2r_shift.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg/simd_2r_shift.rs index 4e3dd17..a0815bc 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg/simd_2r_shift.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_12reg/simd_2r_shift.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg.rs index 8015c9e..3a81641 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_2r_misc.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_2r_misc.rs index 6c9da53..f4c3fd7 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_2r_misc.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_2r_misc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_2r_sc.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_2r_sc.rs index 5ad5b49..3a305d9 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_2r_sc.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_2r_sc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_3diff.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_3diff.rs index 17c15e7..3751db0 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_3diff.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_3diff.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_dup_sc.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_dup_sc.rs index 1b30178..fdf271e 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_dup_sc.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_dup_sc.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_ext.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_ext.rs index bb8f5e0..0cb3d23 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_ext.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_ext.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_tbl.rs b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_tbl.rs index 123f0a4..5eaaea8 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_tbl.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/simddp/t_simd_mulreg/simd_tbl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32.rs b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32.rs index 5a71369..391281f 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/cp_mov32.rs b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/cp_mov32.rs index 9a1f078..a50e1ae 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/cp_mov32.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/cp_mov32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_mov16.rs b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_mov16.rs index 47279d9..9892930 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_mov16.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_mov16.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_mov32.rs b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_mov32.rs index 78b5d81..5173a15 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_mov32.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_mov32.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_msr.rs b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_msr.rs index 6f61da3..d4ffa0c 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_msr.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/fp_msr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/simd_dup_el.rs b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/simd_dup_el.rs index 7879fca..dced7c5 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/simd_dup_el.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sys_mov32/simd_dup_el.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64.rs b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64.rs index 355481e..779429d 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/cp_ldst.rs b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/cp_ldst.rs index 64454a3..44a82ce 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/cp_ldst.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/cp_ldst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/cp_mov64.rs b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/cp_mov64.rs index 47f85c3..e81e992 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/cp_mov64.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/cp_mov64.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/simdfp_ldst.rs b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/simdfp_ldst.rs index 26531e8..e63a485 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/simdfp_ldst.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/simdfp_ldst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/simdfp_mov64.rs b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/simdfp_mov64.rs index 888d6f2..0154b5c 100644 --- a/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/simdfp_mov64.rs +++ b/aarchmrs-instructions/src/T32/w/cpaf/sysldst_mov64/simdfp_mov64.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dpint_immm.rs b/aarchmrs-instructions/src/T32/w/dpint_immm.rs index 7ddda74..b0112ca 100644 --- a/aarchmrs-instructions/src/T32/w/dpint_immm.rs +++ b/aarchmrs-instructions/src/T32/w/dpint_immm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dpint_shiftr.rs b/aarchmrs-instructions/src/T32/w/dpint_shiftr.rs index af20e68..82bb920 100644 --- a/aarchmrs-instructions/src/T32/w/dpint_shiftr.rs +++ b/aarchmrs-instructions/src/T32/w/dpint_shiftr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dstd.rs b/aarchmrs-instructions/src/T32/w/dstd.rs index 95a3f80..3f407db 100644 --- a/aarchmrs-instructions/src/T32/w/dstd.rs +++ b/aarchmrs-instructions/src/T32/w/dstd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dstd/ldastl.rs b/aarchmrs-instructions/src/T32/w/dstd/ldastl.rs index 6956ff1..9042561 100644 --- a/aarchmrs-instructions/src/T32/w/dstd/ldastl.rs +++ b/aarchmrs-instructions/src/T32/w/dstd/ldastl.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dstd/lddlit.rs b/aarchmrs-instructions/src/T32/w/dstd/lddlit.rs index fac42f6..90194bc 100644 --- a/aarchmrs-instructions/src/T32/w/dstd/lddlit.rs +++ b/aarchmrs-instructions/src/T32/w/dstd/lddlit.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dstd/ldstd_imm.rs b/aarchmrs-instructions/src/T32/w/dstd/ldstd_imm.rs index 8160a87..94ee5e4 100644 --- a/aarchmrs-instructions/src/T32/w/dstd/ldstd_imm.rs +++ b/aarchmrs-instructions/src/T32/w/dstd/ldstd_imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dstd/ldstd_post.rs b/aarchmrs-instructions/src/T32/w/dstd/ldstd_post.rs index dda3c3b..dc8cb1a 100644 --- a/aarchmrs-instructions/src/T32/w/dstd/ldstd_post.rs +++ b/aarchmrs-instructions/src/T32/w/dstd/ldstd_post.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dstd/ldstd_pre.rs b/aarchmrs-instructions/src/T32/w/dstd/ldstd_pre.rs index e944496..c4789b7 100644 --- a/aarchmrs-instructions/src/T32/w/dstd/ldstd_pre.rs +++ b/aarchmrs-instructions/src/T32/w/dstd/ldstd_pre.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dstd/ldstex.rs b/aarchmrs-instructions/src/T32/w/dstd/ldstex.rs index 4ae796d..f854bb8 100644 --- a/aarchmrs-instructions/src/T32/w/dstd/ldstex.rs +++ b/aarchmrs-instructions/src/T32/w/dstd/ldstex.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dstd/ldstex_bhd.rs b/aarchmrs-instructions/src/T32/w/dstd/ldstex_bhd.rs index bfb5170..21435fc 100644 --- a/aarchmrs-instructions/src/T32/w/dstd/ldstex_bhd.rs +++ b/aarchmrs-instructions/src/T32/w/dstd/ldstex_bhd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/dstd/tblbr.rs b/aarchmrs-instructions/src/T32/w/dstd/tblbr.rs index 01534bc..8187289 100644 --- a/aarchmrs-instructions/src/T32/w/dstd/tblbr.rs +++ b/aarchmrs-instructions/src/T32/w/dstd/tblbr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/imm.rs b/aarchmrs-instructions/src/T32/w/imm.rs index b3094b8..61f263e 100644 --- a/aarchmrs-instructions/src/T32/w/imm.rs +++ b/aarchmrs-instructions/src/T32/w/imm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/imm/dpint_imms.rs b/aarchmrs-instructions/src/T32/w/imm/dpint_imms.rs index 41fce00..46c6bd4 100644 --- a/aarchmrs-instructions/src/T32/w/imm/dpint_imms.rs +++ b/aarchmrs-instructions/src/T32/w/imm/dpint_imms.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/imm/movw.rs b/aarchmrs-instructions/src/T32/w/imm/movw.rs index 43c4fa3..b660047 100644 --- a/aarchmrs-instructions/src/T32/w/imm/movw.rs +++ b/aarchmrs-instructions/src/T32/w/imm/movw.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/imm/sat_bit.rs b/aarchmrs-instructions/src/T32/w/imm/sat_bit.rs index 6a34f9b..42e4e6c 100644 --- a/aarchmrs-instructions/src/T32/w/imm/sat_bit.rs +++ b/aarchmrs-instructions/src/T32/w/imm/sat_bit.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst.rs b/aarchmrs-instructions/src/T32/w/ldst.rs index a9660d2..ba88c0c 100644 --- a/aarchmrs-instructions/src/T32/w/ldst.rs +++ b/aarchmrs-instructions/src/T32/w/ldst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldlit_signed.rs b/aarchmrs-instructions/src/T32/w/ldst/ldlit_signed.rs index 6360f3e..3f27f40 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldlit_signed.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldlit_signed.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldlit_signed/ldlit_signed_reserved.rs b/aarchmrs-instructions/src/T32/w/ldst/ldlit_signed/ldlit_signed_reserved.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldlit_signed/ldlit_signed_reserved.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldlit_signed/ldlit_signed_reserved.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldlit_unsigned.rs b/aarchmrs-instructions/src/T32/w/ldst/ldlit_unsigned.rs index d8b09ee..95bb142 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldlit_unsigned.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldlit_unsigned.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_nimm.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_nimm.rs index ddc7ad5..025333a 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_nimm.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_nimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_nimm/ldst_signed_nimm_reserved.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_nimm/ldst_signed_nimm_reserved.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_nimm/ldst_signed_nimm_reserved.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_nimm/ldst_signed_nimm_reserved.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pimm.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pimm.rs index b0e1dc9..f291429 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pimm.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pimm/ldst_signed_pimm_reserved.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pimm/ldst_signed_pimm_reserved.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pimm/ldst_signed_pimm_reserved.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pimm/ldst_signed_pimm_reserved.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_post.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_post.rs index e52004f..01137ba 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_post.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_post.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pre.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pre.rs index 2434482..e8a4d71 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pre.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_pre.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_reg.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_reg.rs index 0258b8d..f74d41e 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_reg.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_reg/ldst_signed_reg_reserved.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_reg/ldst_signed_reg_reserved.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_reg/ldst_signed_reg_reserved.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_reg/ldst_signed_reg_reserved.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_unpriv.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_unpriv.rs index 1f7dbb8..ce2048e 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_unpriv.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_signed_unpriv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_nimm.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_nimm.rs index 638a82f..b5b14e4 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_nimm.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_nimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_pimm.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_pimm.rs index e09101c..90ad4bd 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_pimm.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_pimm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_post.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_post.rs index 570218b..18406d6 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_post.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_post.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_pre.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_pre.rs index 22e72cd..db2b444 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_pre.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_pre.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_reg.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_reg.rs index 3a8c6b4..2d0dc36 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_reg.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_unpriv.rs b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_unpriv.rs index 1abaa9a..ce2b8f7 100644 --- a/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_unpriv.rs +++ b/aarchmrs-instructions/src/T32/w/ldst/ldst_unsigned_unpriv.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/ldstm.rs b/aarchmrs-instructions/src/T32/w/ldstm.rs index 964c07a..c7d94c7 100644 --- a/aarchmrs-instructions/src/T32/w/ldstm.rs +++ b/aarchmrs-instructions/src/T32/w/ldstm.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/lmul_div.rs b/aarchmrs-instructions/src/T32/w/lmul_div.rs index db89bcb..cacf29b 100644 --- a/aarchmrs-instructions/src/T32/w/lmul_div.rs +++ b/aarchmrs-instructions/src/T32/w/lmul_div.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/lmul_div/div.rs b/aarchmrs-instructions/src/T32/w/lmul_div/div.rs index 63acf50..aa0e99d 100644 --- a/aarchmrs-instructions/src/T32/w/lmul_div/div.rs +++ b/aarchmrs-instructions/src/T32/w/lmul_div/div.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/lmul_div/lmul.rs b/aarchmrs-instructions/src/T32/w/lmul_div/lmul.rs index 0eba67f..9fbc49d 100644 --- a/aarchmrs-instructions/src/T32/w/lmul_div/lmul.rs +++ b/aarchmrs-instructions/src/T32/w/lmul_div/lmul.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/mul.rs b/aarchmrs-instructions/src/T32/w/mul.rs index 386ae1d..899ae05 100644 --- a/aarchmrs-instructions/src/T32/w/mul.rs +++ b/aarchmrs-instructions/src/T32/w/mul.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/mul/mul_abd.rs b/aarchmrs-instructions/src/T32/w/mul/mul_abd.rs index 4d1812f..8454778 100644 --- a/aarchmrs-instructions/src/T32/w/mul/mul_abd.rs +++ b/aarchmrs-instructions/src/T32/w/mul/mul_abd.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/reg.rs b/aarchmrs-instructions/src/T32/w/reg.rs index 5375b46..b33208e 100644 --- a/aarchmrs-instructions/src/T32/w/reg.rs +++ b/aarchmrs-instructions/src/T32/w/reg.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/reg/addsub_par.rs b/aarchmrs-instructions/src/T32/w/reg/addsub_par.rs index 806cc6b..bd9f781 100644 --- a/aarchmrs-instructions/src/T32/w/reg/addsub_par.rs +++ b/aarchmrs-instructions/src/T32/w/reg/addsub_par.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/reg/dpint_2r.rs b/aarchmrs-instructions/src/T32/w/reg/dpint_2r.rs index fdbbb0e..5ca6a0d 100644 --- a/aarchmrs-instructions/src/T32/w/reg/dpint_2r.rs +++ b/aarchmrs-instructions/src/T32/w/reg/dpint_2r.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/reg/dpint_2r/dpint_2r_unpred_0.rs b/aarchmrs-instructions/src/T32/w/reg/dpint_2r/dpint_2r_unpred_0.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/T32/w/reg/dpint_2r/dpint_2r_unpred_0.rs +++ b/aarchmrs-instructions/src/T32/w/reg/dpint_2r/dpint_2r_unpred_0.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/reg/dpint_2r/dpint_2r_unpred_1.rs b/aarchmrs-instructions/src/T32/w/reg/dpint_2r/dpint_2r_unpred_1.rs index d37afa9..7b7b430 100644 --- a/aarchmrs-instructions/src/T32/w/reg/dpint_2r/dpint_2r_unpred_1.rs +++ b/aarchmrs-instructions/src/T32/w/reg/dpint_2r/dpint_2r_unpred_1.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/reg/extendr.rs b/aarchmrs-instructions/src/T32/w/reg/extendr.rs index 86f45b4..9bac74f 100644 --- a/aarchmrs-instructions/src/T32/w/reg/extendr.rs +++ b/aarchmrs-instructions/src/T32/w/reg/extendr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/reg/shiftr.rs b/aarchmrs-instructions/src/T32/w/reg/shiftr.rs index 140bdd2..f6d1b21 100644 --- a/aarchmrs-instructions/src/T32/w/reg/shiftr.rs +++ b/aarchmrs-instructions/src/T32/w/reg/shiftr.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/vldst.rs b/aarchmrs-instructions/src/T32/w/vldst.rs index 7014f49..8ff5831 100644 --- a/aarchmrs-instructions/src/T32/w/vldst.rs +++ b/aarchmrs-instructions/src/T32/w/vldst.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/vldst/asimldall.rs b/aarchmrs-instructions/src/T32/w/vldst/asimldall.rs index f9341eb..28cff63 100644 --- a/aarchmrs-instructions/src/T32/w/vldst/asimldall.rs +++ b/aarchmrs-instructions/src/T32/w/vldst/asimldall.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/vldst/asimldstms.rs b/aarchmrs-instructions/src/T32/w/vldst/asimldstms.rs index 63bbe68..9e5d03b 100644 --- a/aarchmrs-instructions/src/T32/w/vldst/asimldstms.rs +++ b/aarchmrs-instructions/src/T32/w/vldst/asimldstms.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/T32/w/vldst/asimldstss.rs b/aarchmrs-instructions/src/T32/w/vldst/asimldstss.rs index 1f02527..4a3d6be 100644 --- a/aarchmrs-instructions/src/T32/w/vldst/asimldstss.rs +++ b/aarchmrs-instructions/src/T32/w/vldst/asimldstss.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ diff --git a/aarchmrs-instructions/src/lib.rs b/aarchmrs-instructions/src/lib.rs index e3ed4a7..b68a856 100644 --- a/aarchmrs-instructions/src/lib.rs +++ b/aarchmrs-instructions/src/lib.rs @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2025 Arm Limited or its affiliates. All rights reserved. +/* Copyright (c) 2010-2026 Arm Limited or its affiliates. All rights reserved. * * This document is Non-confidential and licensed under the BSD 3-clause license. */ From 646b1fb3d947088c93d80b373f5d428c3793466b Mon Sep 17 00:00:00 2001 From: Ivan Boldyrev Date: Tue, 14 Apr 2026 18:40:43 +0200 Subject: [PATCH 4/4] instructions: Update the crate version --- Cargo.toml | 4 ++-- aarchmrs-gen/Cargo.toml | 2 +- aarchmrs-gen/src/lib.rs | 11 +++++------ aarchmrs-instructions/Cargo.toml | 2 +- tools/aarchmrs-generate/src/main.rs | 2 +- 5 files changed, 10 insertions(+), 11 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 5546eb0..f776da2 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -18,8 +18,8 @@ members = [ resolver = "3" [workspace.dependencies] -aarchmrs-gen = { path = "aarchmrs-gen", version = "0.2.0-2025-12" } -aarchmrs-instructions = { path = "aarchmrs-instructions", version = "0.3.0-2025-12" } +aarchmrs-gen = { path = "aarchmrs-gen", version = "0.2.1-2026-03" } +aarchmrs-instructions = { path = "aarchmrs-instructions", version = "0.4.0-2026-03" } aarchmrs-parser = { path = "aarchmrs-parser", version = "0.1.0" } aarchmrs-types = { path = "aarchmrs-types", version = "0.1.2" } harm = { path = "harm", version = "0.1.0" } diff --git a/aarchmrs-gen/Cargo.toml b/aarchmrs-gen/Cargo.toml index 12147cf..9ba3850 100644 --- a/aarchmrs-gen/Cargo.toml +++ b/aarchmrs-gen/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "aarchmrs-gen" -version = "0.2.0-2025-12" +version = "0.2.1-2026-03" edition = "2024" description = "AARCHMRS generator" license = "BSD-3-Clause" diff --git a/aarchmrs-gen/src/lib.rs b/aarchmrs-gen/src/lib.rs index 93e34de..4da1884 100644 --- a/aarchmrs-gen/src/lib.rs +++ b/aarchmrs-gen/src/lib.rs @@ -3,9 +3,8 @@ * This document is licensed under the BSD 3-clause license. */ -use std::borrow::Cow; use std::io; -use std::path::Path; +use std::path::{Path, PathBuf}; use aarchmrs_parser::instructions::{ Encodeset, InstructionGroup, InstructionGroupOrInstruction, License, @@ -35,19 +34,19 @@ pub fn gen_instructions( cache_dir: &Path, r#mod: bool, doc_file: Option<&Path>, - archive_path: Option<&Path>, + archive_path: Option, ) -> Result<(), DownloadError> { let archive_path = match archive_path { Some(archive_path) => { - if is_valid_archive(archive_path) { - Cow::Borrowed(archive_path) + if is_valid_archive(&archive_path) { + archive_path } else { return Err(DownloadError::Io(io::Error::other( "The archive file doesn't match the parameters or doesn't exist", ))); } } - None => Cow::Owned(ensure_archive(cache_dir)?), + None => ensure_archive(cache_dir)?, }; let gz_archive_file = std::fs::File::open(archive_path)?; diff --git a/aarchmrs-instructions/Cargo.toml b/aarchmrs-instructions/Cargo.toml index 680080f..b5129fa 100644 --- a/aarchmrs-instructions/Cargo.toml +++ b/aarchmrs-instructions/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "aarchmrs-instructions" -version = "0.3.0-2025-12" +version = "0.4.0-2026-03" edition = "2024" description = "AARCHMRS-generated ARM instructions functions" license = "BSD-3-Clause" diff --git a/tools/aarchmrs-generate/src/main.rs b/tools/aarchmrs-generate/src/main.rs index c0cd81e..3e5fe5f 100644 --- a/tools/aarchmrs-generate/src/main.rs +++ b/tools/aarchmrs-generate/src/main.rs @@ -31,7 +31,7 @@ fn main() -> eyre::Result<()> { &temp_dir, args.r#mod, args.doc_file.as_deref(), - args.archive_file.as_deref(), + args.archive_file, ) .unwrap();