It would be nice to expose `SB_LEDDA_IP` (as in https://github.com/im-tomu/foboot/blob/master/hw/rtl/sbled.py#L93) to the verilog and litex samples, so that developers going thru the workshop can do more advanced led PWM manipulation.
It would be nice to expose
SB_LEDDA_IP(as in https://github.com/im-tomu/foboot/blob/master/hw/rtl/sbled.py#L93) to the verilog and litex samples, so that developers going thru the workshop can do more advanced led PWM manipulation.