From b927f681ccb459d1a846aae22653362ddfb79e23 Mon Sep 17 00:00:00 2001 From: Scalecode Solutions Date: Fri, 3 Apr 2026 16:37:47 -0500 Subject: [PATCH] fix(ads1258): correct CONFIG1 SCBCS field values for bits [3:2] MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CONFIG1_SCBCS_1_5uA and CONFIG1_SCBCS_24uA were set to 0x40 and 0xC0, which place the values in the DLY/IDLMOD bit positions (bits [7:6]) instead of the SCBCS field (bits [3:2]). The header's own mask confirms the correct position: CONFIG1_SCBCS_MASK = 0x0C (bits [3:2]) The previous values fail their own mask: 0x40 & 0x0C = 0x00 (no bits in SCBCS field) 0xC0 & 0x0C = 0x00 (no bits in SCBCS field) Corrected per ADS1258 datasheet SBAS297G, Table 18, page 38: SBCS[1:0] = 0 (0x00) → Off SBCS[1:0] = 1 (0x04) → 1.5µA Source SBCS[1:0] = 3 (0x0C) → 24µA Source Note: 0x40 collides with CONFIG1_DLY_64us defined on line 196 of the same file, meaning any code using CONFIG1_SCBCS_1_5uA would silently configure a 64µs switch time delay instead of enabling sensor bias. --- devices/ads1258/ads1258.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/devices/ads1258/ads1258.h b/devices/ads1258/ads1258.h index d3a9207..1480633 100644 --- a/devices/ads1258/ads1258.h +++ b/devices/ads1258/ads1258.h @@ -200,8 +200,8 @@ /* SCBCS field values */ #define CONFIG1_SCBCS_OFF ((uint8_t) 0x00) - #define CONFIG1_SCBCS_1_5uA ((uint8_t) 0x40) - #define CONFIG1_SCBCS_24uA ((uint8_t) 0xC0) + #define CONFIG1_SCBCS_1_5uA ((uint8_t) 0x04) + #define CONFIG1_SCBCS_24uA ((uint8_t) 0x0C) /* DRATE field values (fixed-channel DRs shown) */ #define CONFIG1_DRATE_1953SPS ((uint8_t) 0x00)