[BUG]: IPC-enabled pinned pool uses a fixed host NUMA node

[rwgk]

Is this a duplicate?

• I confirmed there appear to be no duplicate issues for this bug and that I agree to the Code of Conduct

Type of Bug

Runtime Error

Component

cuda.core

Describe the bug

PinnedMemoryResource(ipc_enabled=True) currently routes pinned IPC pools to host NUMA location ID 0 instead of the NUMA node closest to the active CUDA device. On multi-NUMA systems (especially when the current device is attached to a non-zero host NUMA node), this can cause pinned IPC pool creation/allocation failures or incorrect NUMA placement. The expected behavior is to select the current device's host NUMA ID (with a safe fallback only when the attribute/context is unavailable).

(Generated by Cursor(GPT-5.3 Codex Extra High) based on the production code changes under #1575)

How to Reproduce

See nvbug 5823243

Expected behavior

See test under #1575

Operating System

No response

nvidia-smi output

No response

[rparolin]

@rwgk Do we have a test case that showcases this bug?

[rwgk]

@rwgk Do we have a test case that showcases this bug?

See nvbug 5823243 (referenced in the issue description): we have an existing test. It doesn't fail with any of the hardware we have in our CI, but running it on different hardware exposed the bug. It seems there is an easy fix. PR #1575 (closed) is still there for reference.

[Andy-Jost]

If a NUMA warning is still emitted after the fix, we should add a test for it (similar to the approach in #1607 for the managed memory concurrent access warning).